Merav Aharoni

According to our database1, Merav Aharoni authored at least 11 papers between 2002 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2016
Using Graph-Based CSP to Solve the Address Translation Problem.
Proceedings of the Principles and Practice of Constraint Programming, 2016

2015
Rectangle Placement for VLSI Testing.
Proceedings of the Integration of AI and OR Techniques in Constraint Programming, 2015

2011
Simulation-Based Verification of Floating-Point Division.
IEEE Trans. Computers, 2011

Floorplanning challenges in early chip planning.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Injecting Floating-Point Testing Knowledge into Test Generators.
Proceedings of the Hardware and Software: Verification and Testing, 2011

2007
Decimal floating-point in z9: An implementation and testing perspective.
IBM J. Res. Dev., 2007

Solving Constraints on the Intermediate Result of Decimal Floating-Point Operations.
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18 2007), 2007

2005
Solving Constraints on the Invisible Bits of the Intermediate Result for Floating-Point Verification.
Proceedings of the 17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 2005

2003
FPgen - a test generation framework for datapath floating-point verification.
Proceedings of the Eighth IEEE International High-Level Design Validation and Test Workshop 2003, 2003

Solving Range Constraints for Binary Floating-Point Instructions.
Proceedings of the 16th IEEE Symposium on Computer Arithmetic (Arith-16 2003), 2003

2002
An effective and flexible approach to functional verification of processor families.
Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002


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