Guojie Luo

Ming Jiang

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

An Efficient Mapping Approach to Large-Scale DNNs on Multi-FPGA Architectures.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Parallel Stateful Logic in RRAM: Theoretical Analysis and Arithmetic Design.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018

Smartphone-Based Indoor Map Construction - Principles and Applications

[BibT_eX]

[DOI]

Springer Briefs in Computer Science, Springer, ISBN: 978-981-10-8377-8, 2018

V-PIM: An Analytical Overhead Model for Processing-in-Memory Architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

Accelerating Mobile Applications at the Network Edge with Software-Programmable FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2018 IEEE Conference on Computer Communications, 2018

cuMBIR: An Efficient Framework for Low-dose X-ray CT Image Reconstruction on GPUs.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Supercomputing, 2018

Adaptive-precision framework for SGD using deep Q-learning.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Computer-Aided Design, 2018

Mapping Large-Scale DNNs on Asymmetric FPGAs: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

BoxPlacer: Force Directed-Based Timing-Driven Placement for Large-Scale FPGAs: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Towards Serial-Equivalent Parallel Routing for FPGAs: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

Exploiting Box Expansion and Grid Partitioning for Parallel FPGA Routing.

[BibT_eX]

[DOI]

Nong Xiao

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

FPGA-Based Real-Time Super-Resolution System for Ultra High Definition Videos.

[BibT_eX]

[DOI]

Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

2017

Smartphone-Based Real Time Vehicle Tracking in Indoor Parking Structures.

[BibT_eX]

[DOI]

IEEE Trans. Mob. Comput., 2017

Tiguan: Energy-aware collision-free control for large-scale connected vehicles.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Search space reduction for the non-exact projective NPNP Boolean matching problem.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Dependency-Aware Parallel Routing for Large-Scale FPGAs.

[BibT_eX]

[DOI]

Nong Xiao

Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

A coordinated synchronous and asynchronous parallel routing approach for FPGAs.

[BibT_eX]

[DOI]

Nong Xiao

Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

A Parallel Bandit-Based Approach for Autotuning FPGA Compilation.

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion.

[BibT_eX]

[DOI]

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

FPGA Acceleration for Computational Glass-Free Displays.

[BibT_eX]

[DOI]

Zhuolun He

Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2017

Megrez: Parallelizing FPGA Routing with Strictly-Ordered Partitioning.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

2016

Analytical Clustering Score with Application to Postplacement Register Clustering.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2016

Multi-Story Indoor Floor Plan Reconstruction via Mobile Crowdsensing.

[BibT_eX]

[DOI]

IEEE Trans. Mob. Comput., 2016

Sextant: Towards Ubiquitous Indoor Localization Service by Photo-Taking of the Environment.

[BibT_eX]

[DOI]

IEEE Trans. Mob. Comput., 2016

Scaling Up Physical Design: Challenges and Opportunities.

[BibT_eX]

[DOI]

Proceedings of the 2016 on International Symposium on Physical Design, 2016

Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster.

[BibT_eX]

[DOI]

Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

A fast and accurate approach for common path pessimism removal in static timing analysis.

[BibT_eX]

[DOI]

Baihong Jin

Wentai Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

VeMap: Indoor Road Map Construction via Smartphone-Based Vehicle Tracking.

[BibT_eX]

[DOI]

Ruipeng Gao

Fan Ye

Proceedings of the 2016 IEEE Global Communications Conference, 2016

2015

VeTrack: Real Time Vehicle Tracking in Uninstrumented Indoor Environments.

[BibT_eX]

[DOI]

Proceedings of the 13th ACM Conference on Embedded Networked Sensor Systems, 2015

Analytical Clustering Score with Application to Post-Placement Multi-Bit Flip-Flop Merging.

[BibT_eX]

[DOI]

Proceedings of the 2015 Symposium on International Symposium on Physical Design, ISPD 2015, Monterey, CA, USA, March 29, 2015

Accelerate FPGA Routing with Parallel Recursive Partitioning.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only).

[BibT_eX]

[DOI]

Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015

A Fast and Simple Block-Based Approach for Common Path Pessimism Removal in Static Timing Analysis.

[BibT_eX]

[DOI]

Baihong Jin

Wentai Zhang

Proceedings of the 14th International Conference on Computer-Aided Design and Computer Graphics, 2015

2014

VeLoc: finding your car in the parking lot.

[BibT_eX]

[DOI]

Proceedings of the 12th ACM Conference on Embedded Network Sensor Systems, 2014

Rapid design space exploration of two-level unified caches.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Analyzing the impact of heterogeneous blocks on FPGA placement quality.

[BibT_eX]

[DOI]

Chang Xu

Wentai Zhang

Proceedings of the 2014 International Conference on Field-Programmable Technology, 2014

FPGA Acceleration for Simultaneous Medical Image Reconstruction and Segmentation.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2013

An Analytical Placement Framework for 3-D ICs and Its Extension on Thermal Awareness.

[BibT_eX]

[DOI]

Yiyu Shi

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

FF-bond: multi-bit flip-flop bonding at placement.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Physical Design, 2013

Optimizing routability in large-scale mixed-size placement.

[BibT_eX]

[DOI]

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

Towards layout-friendly high-level synthesis.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Physical Design, 2012

Memory partitioning and scheduling co-optimization in behavioral synthesis.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

2011

Floorplanning challenges in early chip planning.

[BibT_eX]

[DOI]

Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Physical hierarchy exploration of 3D processors.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2011

A unified optimization framework for simultaneous gate sizing and placement under density constraints.

[BibT_eX]

[DOI]

John Lee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Early chip planning cockpit.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Thermal-aware cell and through-silicon-via co-placement for 3D ICs.

[BibT_eX]

[DOI]

Yiyu Shi

Proceedings of the 48th Design Automation Conference, 2011

2010

Advances and Challenges in 3D Physical Design.

[BibT_eX]

[DOI]

IPSJ Trans. Syst. LSI Des. Methodol., 2010

An analytical placer for mixed-size 3D placement.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Symposium on Physical Design, 2010

Logic-on-logic 3D integration and placement.

[BibT_eX]

[DOI]

Thorlindur Thorolfsson

Paul D. Franzon

Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009

A multilevel analytical placement for 3D ICs.

[BibT_eX]

[DOI]

Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008

Highly Efficient Gradient Computation for Density-Constrained Analytical Placement.

[BibT_eX]

[DOI]

Eric Radke

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Highly efficient gradient computation for density-constrained analytical placement methods.

[BibT_eX]

[DOI]