Michael Velten

According to our database1, Michael Velten authored at least 21 papers between 2005 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Hardware-based Integrity Protection combined with Continuous User Verification in Virtualized Systems.
PhD thesis, 2017

2015
User Identity Verification Based on Touchscreen Interaction Analysis in Web Contexts.
Proceedings of the Information Security Practice and Experience, 2015

A Secure Architecture for Operating System-Level Virtualization on Mobile Devices.
Proceedings of the Information Security and Cryptology - 11th International Conference, 2015

2014
The metamodeling approach to system level synthesis.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Metasynthesis for Designing Automotive SoCs.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Active File Integrity Monitoring Using Paravirtualized Filesystems.
Proceedings of the Trusted Systems - 5th International Conference, 2013

2012
Secure and Privacy-Aware Multiplexing of Hardware-Protected TPM Integrity Measurements among Virtual Machines.
Proceedings of the Information Security and Cryptology - ICISC 2012, 2012

SystemC as completing pillar in industrial OVM based verification environments.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2010
The ObjectRules Framework - Providing Ad Hoc Context-Dependent Assistance in Dynamic Environments.
Proceedings of the Sixth International Conference on Intelligent Environments, 2010

Fast and accurate UML State Chart modeling using TLM<sup>+</sup> control flow abstraction.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Model reduction techniques for the formal verification of hardware dependent software.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

TLM+ modeling of embedded HW/SW systems.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
Using a dataflow abstracted virtual prototype for HdS-design.
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2007
Requirements and Concepts for Transaction Level Assertion Refinement.
Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Interactive presentation: Implementation of a transaction level assertion framework in SystemC.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Requirements and Concepts for Transaction Level Assertions.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Specification Language for Transaction Level Assertions.
Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

IP Library For Temporal SystemC Assertions.
Proceedings of the Forum on specification and Design Languages, 2006

Case Study on Transaction Level Modeling.
Proceedings of the Forum on specification and Design Languages, 2006

2005
Abstrakte Modellierung der Eigenschaften von nanoelektronischen CNT-Elementen in SystemC.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005


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