Volkan Esen

According to our database, Volkan Esen authored at least 22 papers between 2004 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Cost Optimization at Early Stages of Design Using Deep Reinforcement Learning.

Lorenzo Servadei, Jiapeng Zheng, Jose A. Arjona-Medina, Michael Werner, Volkan Esen, Sepp Hochreiter, Wolfgang Ecker, Robert Wille

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

SoC Design Automation with ML - It's Time for Research.

Vijay Deep Bhatt, Wolfgang Ecker, Volkan Esen, Zhao Han, Daniela Sanchez Lopera, Rituj Patel, Lorenzo Servadei, Sahil Singla, Sven Wenzek, Vijaydeep Yadav, Elena Zennaro

Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020

2016

Earth Mover's Distance as a Comparison Metric for Analog Behavior.

Alexander W. Rath, Sebastian Simon, Volkan Esen, Wolfgang Ecker

Proceedings of the VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability, 2016

Automatically comparing analog behavior using Earth Mover's Distance.

Alexander W. Rath, Sebastian Simon, Volkan Esen, Wolfgang Ecker

Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

2014

A transaction-oriented UVM-based library for verification of analog behavior.

Alexander W. Rath, Volkan Esen, Wolfgang Ecker

Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013

Comparison of analog transactions using statistics.

Alexander W. Rath, Volkan Esen, Wolfgang Ecker

Proceedings of the 2013 International Symposium on System on Chip, 2013

2012

The system verification methodology for advanced TLM verification.

Marcio F. da S. Oliveira, Christoph Kuznik, Hoang Minh Le, Daniel Große, Finn Haedicke, Wolfgang Müller, Rolf Drechsler, Wolfgang Ecker, Volkan Esen

Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

SystemC as completing pillar in industrial OVM based verification environments.

Wolfgang Ecker, Volkan Esen, Michael Velten, Tudor Timisescu

Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011

Analog transaction level modeling.

Alexander W. Rath, Volkan Esen, Wolfgang Ecker

Proceedings of the 2011 IEEE International High Level Design Validation and Test Workshop, 2011

State of the art verification methodologies in 2015.

Allan Crone, Oliver Bringmann, C. Chevallaz, B. Dickman, Volkan Esen, M. Rohleder

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Model reduction techniques for the formal verification of hardware dependent software.

Wolfgang Ecker, Volkan Esen, Rainer Findenig, Thomas Steininger, Michael Velten

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

TLM+ modeling of embedded HW/SW systems.

Wolfgang Ecker, Volkan Esen, Robert Schwencker, Thomas Steininger, Michael Velten

Proceedings of the Design, Automation and Test in Europe, 2010

2008

A new assertion language covering multiple levels of abstraction.

Volkan Esen

PhD thesis, 2008

2007

Requirements and Concepts for Transaction Level Assertion Refinement.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten

Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Interactive presentation: Implementation of a transaction level assertion framework in SystemC.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance.

Wolfgang Ecker, Volkan Esen, Lars Schönberg, Thomas Steininger, Michael Velten, Michael Hull

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Execution semantics and formalisms for multi-abstraction TLM assertions.

Wolfgang Ecker, Volkan Esen, Michael Hull

Proceedings of the 4th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2006), 2006

Requirements and Concepts for Transaction Level Assertions.

Wolfgang Ecker, Volkan Esen, Michael Hull, Thomas Steininger, Michael Velten

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

Specification Language for Transaction Level Assertions.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull

Proceedings of the Eleventh Annual IEEE International High-Level Design Validation and Test Workshop 2006, 2006

IP Library For Temporal SystemC Assertions.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Jacob Smit

Proceedings of the Forum on specification and Design Languages, 2006

Case Study on Transaction Level Modeling.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten

Proceedings of the Forum on specification and Design Languages, 2006

2004

Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking.

Wolfgang Ecker, Volkan Esen, Thomas Steininger, Martin Zambaldi

Proceedings of the 7th IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2004), 2004