Min-Yih Hsu

According to our database1, Min-Yih Hsu authored at least 9 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
A Highly Scalable, Hybrid, Cross-Platform Timing Analysis Framework Providing Accurate Differential Throughput Estimation via Instruction-Level Tracing.
Proceedings of the 31st ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering, 2023

2022
DFI: An Interprocedural Value-Flow Analysis Framework that Scales to Large Codebases.
CoRR, 2022

MCAD: Beyond Basic-Block Throughput Estimation Through Differential, Instruction-Level Tracing.
CoRR, 2022

2021
Support NNEF execution model for NNAPI.
J. Supercomput., 2021

2020
Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions.
J. Syst. Archit., 2020

2019
Support OpenCL 2.0 Compiler on LLVM for PTX Simulators.
J. Signal Process. Syst., 2019

2018
Enable the Flow for GPGPU-Sim Simulators with Fixed-Point Instructions.
Proceedings of the 47th International Conference on Parallel Processing, 2018

2017
Analyzing OpenCL 2.0 workloads using a heterogeneous CPU-GPU simulator.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

OpenCL 2.0 Compiler Adaptation on LLVM for PTX Simulators.
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017


  Loading...