Ming-Chang Yang

Orcid: 0000-0002-4029-757X

According to our database1, Ming-Chang Yang authored at least 75 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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On csauthors.net:

Bibliography

2024
Are Superpages Super-fast? Distilling Flash Blocks to Unify Flash Pages of a Superpage in an SSD.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

Celeritas: Out-of-Core Based Unsupervised Graph Neural Network via Cross-Layer Computing 2024.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

Seraph: Towards Scalable and Efficient Fully-external Graph Computation via On-demand Processing.
Proceedings of the 22nd USENIX Conference on File and Storage Technologies, 2024

Grafu: Unleashing the Full Potential of Future Value Computation for Out-of-core Synchronous Graph Processing.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Adaptive Perspective Distillation for Semantic Segmentation.
IEEE Trans. Pattern Anal. Mach. Intell., 2023

SEPH: Scalable, Efficient, and Predictable Hashing on Persistent Memory.
Proceedings of the 17th USENIX Symposium on Operating Systems Design and Implementation, 2023

FSD: File-related Secure Deletion to Prolong the Lifetime of Solid-State Drives.
Proceedings of the 12th Non-Volatile Memory Systems and Applications Symposium, 2023

CHOPPER: A Compiler Infrastructure for Programmable Bit-serial SIMD Processing Using Memory in DRAM.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

EXPERT: EXPloiting DRAM ERror Types to Improve the Effective Forecasting Coverage in the Field.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

2022
Performance Enhancement of SMR-Based Deduplication Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

A File-Oriented Fast Secure Deletion Strategy for Shingled Magnetic Recording Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Leveraging Write Heterogeneity of Phase Change Memory on Supporting Self-Balancing Binary Tree.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

MAGIC: Making IMR-Based HDD Perform Like CMR-Based HDD.
IEEE Trans. Computers, 2022

KVSTL: An Application Support to LSM-Tree Based Key-Value Store via Shingled Translation Layer Data Management.
IEEE Trans. Computers, 2022

Enabling the Duo-Phase Data Management to Realize Longevity Bit-Alterable Flash Memory.
IEEE Trans. Computers, 2022

Efficient Private SCO for Heavy-Tailed Data via Clipping.
CoRR, 2022

Practicably Boosting the Processing Performance of BFS-like Algorithms on Semi-External Graph System via I/O-Efficient Graph Ordering.
Proceedings of the 20th USENIX Conference on File and Storage Technologies, 2022

SMART: on simultaneously marching racetracks to improve the performance of racetrack-based main memory.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

2021
Optimizing Lifetime Capacity and Read Performance of Bit-Alterable 3-D NAND Flash.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

On Minimizing Internal Data Migrations of Flash Devices via Lifetime-Retention Harmonization.
IEEE Trans. Computers, 2021

Exploring and Improving Mobile Level Vision Transformers.
CoRR, 2021

KVIMR: Key-Value Store Aware Data Management Middleware for Interlaced Magnetic Recording Based Hard Disk Drive.
Proceedings of the 2021 USENIX Annual Technical Conference, 2021

Move-On-Modify: An Efficient yet Crash-Consistent Update Strategy for Interlaced Magnetic Recording.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
When Storage Response Time Catches Up With Overall Context Switch Overhead, What Is Next?
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Request Flow Coordination for Growing-Scale Solid-State Drives.
IEEE Trans. Computers, 2020

Joint Management of CPU and NVDIMM for Breaking Down the Great Memory Wall.
IEEE Trans. Computers, 2020

NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN.
Proceedings of the 9th Non-Volatile Memory Systems and Applications Symposium, 2020

How to cultivate a green decision tree without loss of accuracy?
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

Measuring and Improving the Use of Graph Information in Graph Neural Networks.
Proceedings of the 8th International Conference on Learning Representations, 2020

Permutation-Write: Optimizing Write Performance and Energy for Skyrmion Racetrack Memory.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Parallel-Log-Single-Compaction-Tree: Flash-Friendly Two-Level Key-Value Management in KVSSDs.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Understanding and Improving Proximity Graph Based Maximum Inner Product Search.
Proceedings of the Thirty-Fourth AAAI Conference on Artificial Intelligence, 2020

2019
Co-Optimizing Storage Space Utilization and Performance for Key-Value Solid State Drives.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

On Improving the Write Responsiveness for Host-Aware SMR Drives.
IEEE Trans. Computers, 2019

A new sequential-write-constrained cache management to mitigate write amplification for SMR drives.
Proceedings of the 34th ACM/SIGAPP Symposium on Applied Computing, 2019

Replanting Your Forest: NVM-friendly Bagging Strategy for Random Forest.
Proceedings of the 2019 IEEE Non-Volatile Memory Systems and Applications Symposium, 2019

A Representation Learning Framework for Property Graphs.
Proceedings of the 25th ACM SIGKDD International Conference on Knowledge Discovery & Data Mining, 2019

Enabling File-Oriented Fast Secure Deletion on Shingled Magnetic Recording Drives.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

The Best of Both Worlds: On Exploiting Bit-Alterable NAND Flash for Lifetime and Read Performance Optimization.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Enhancing Flash Memory Reliability by Jointly Considering Write-back Pattern and Block Endurance.
ACM Trans. Design Autom. Electr. Syst., 2018

Hot-Spot Suppression for Resource-Constrained Image Recognition Devices With Nonvolatile Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

wrJFS: A Write-Reduction Journaling File System for Byte-addressable NVRAM.
IEEE Trans. Computers, 2018

Boosting the performance with a data-backup-free programming scheme for TLC-based SSDs.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

On Harmonizing Data Lifetime and Block Retention Time for Flash Devices.
Proceedings of the IEEE 7th Non-Volatile Memory Systems and Applications Symposium, 2018

Improving runtime performance of deduplication system with host-managed SMR storage drives.
Proceedings of the 55th Annual Design Automation Conference, 2018

Rethinking self-balancing binary search tree over phase change memory with write asymmetry.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Performance Evaluation of Host Aware Shingled Magnetic Recording (HA-SMR) Drives.
IEEE Trans. Computers, 2017

A pattern-aware write strategy to enhance the reliability of flash-memory storage systems.
Proceedings of the Symposium on Applied Computing, 2017

Virtual persistent cache: Remedy the long latency behavior of host-aware shingled magnetic recording drives.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Enabling Write-Reduction Strategy for Journaling File Systems over Byte-addressable NVRAM.
Proceedings of the 54th Annual Design Automation Conference, 2017

xB+-Tree: Access-Pattern-Aware Cache-Line-Based Tree for Non-volatile Main Memory Architecture.
Proceedings of the 41st IEEE Annual Computer Software and Applications Conference, 2017

KVFTL: Optimization of storage space utilization for key-value-specific flash storage devices.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Utilization-Aware Self-Tuning Design for TLC Flash Storage Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Reducing Data Migration Overheads of Flash Wear Leveling in a Progressive Way.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Byte-Addressable Update Scheme to Minimize the Energy Consumption of PCM-Based Storage Systems.
ACM Trans. Embed. Comput. Syst., 2016

Graceful Space Degradation: An Uneven Space Management for Flash Storage Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Capacity-Independent Address Mapping for Flash Storage Devices with Explosively Growing Capacity.
IEEE Trans. Computers, 2016

Virtual Flash Chips: Reinforcing the Hardware Abstraction Layer to Improve Data Recoverability of Flash Devices.
IEEE Trans. Computers, 2016

Multi-Grained Block Management to Enhance the Space Utilization of File Systems on PCM Storages.
IEEE Trans. Computers, 2016

A Multi-Constraint Scheme with Authorized Mechanism for the Patient Safety.
J. Medical Syst., 2016

Evaluating Host Aware SMR Drives.
Proceedings of the 8th USENIX Workshop on Hot Topics in Storage and File Systems, 2016

2015
Efficient Victim Block Selection for Flash Storage Devices.
IEEE Trans. Computers, 2015

Reliability-aware striping with minimized performance overheads for flash-based storage devices.
Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2015

Logical data packing for multi-chip flash-memory storage systems.
Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

PWL: a progressive wear leveling to minimize data migration overheads for nand flash devices.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Virtual flash chips: rethinking the layer design of flash devices to improve data recoverability.
Proceedings of the 52nd Annual Design Automation Conference, 2015

2014
Garbage collection and wear leveling for flash memory: Past and future.
Proceedings of the International Conference on Smart Computing, 2014

Endurance-aware clustering-based mining algorithm for non-volatile phase-change memory.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

Bad page relaxation to prolong the lifetime of flash devices.
Proceedings of the IEEE 3rd Global Conference on Consumer Electronics, 2014

2013
A reliability enhancement design under the flash translation layer for MLC-based flash-memory storage systems.
ACM Trans. Embed. Comput. Syst., 2013

A fifty-percent rule to minimize the energy consumption of PCM-based storage systems.
Proceedings of the 2013 IEEE 19th International Conference on Embedded and Real-Time Computing Systems and Applications, 2013

New ERA: new efficient reliability-aware wear leveling for endurance enhancement of flash storage devices.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Performance enhancement of garbage collection for flash storage devices: an efficient victim block selection design.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Working-set-based address mapping for ultra-large-scaled flash devices.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012


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