Minh Quang Do

According to our database, Minh Quang Do authored at least 5 papers between 2003 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2007

Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays.

Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

High-Accuracy Architecture-Level Power Estimation for Partitioned SRAM Arrays in a 65-nm CMOS BPTM Process.

Minh Quang Do, Per Larsson-Edefors, Mindaugas Drazdziulis

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

2006

Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration.

Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-Edefors, Lars Bengtsson

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

2004

Table-Based Total Power Consumption Estimation of Memory Arrays for Architects.

Minh Quang Do, Per Larsson-Edefors, Lars Bengtsson

Proceedings of the Integrated Circuit and System Design, 2004

2003

DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures.

Minh Quang Do, Lars Bengtsson, Per Larsson-Edefors

Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003