MouFu Kong

Orcid: 0000-0003-2964-7652

According to our database1, MouFu Kong authored at least 15 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Modeling and simulation of an insulated-gate HEMT using p-SnO<sub>2</sub> gate for high V<sub>TH</sub> design.
Microelectron. J., September, 2023

Comprehensive Comparison of Temperature Performances for SiC Trench MOSFET with Integrated Side-wall Schottky Diode and Heterojunction.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Novel 1200-V Class SiC MOSFET With Schottky Barrier Diode for Improved third quadrant performance.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Novel SiC Superjunction Trench MOSFET with Integrated Heterojunction Diode for Improved Performance.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

An Ultra-low Specific On-resistance SiC LDMOS Using Double RESURF and Field Plate Techniques.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

A Novel Semi-superjunction SiC Trench MOSFET with Ultra-low Specific On-resistance.
Proceedings of the 15th IEEE International Conference on ASIC, 2023

2021
A Vertical Thin Layer pLDMOS with Linear doping realizing ultralow Ron, sp.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A split-gate SiC trench MOSFET with embedded unipolar diode for improved performances.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A Novel Trench MOSFET with p-Pillar and RSO Accumulation Layer for Improved Performance.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

A New Ga2O3 Trench Schottky Barrier Diode with Improved Forward Conduction Characteristics.
Proceedings of the 14th IEEE International Conference on ASIC, 2021

2020
Simulation study of an ultra-low specific on-resistance high-voltage pLDMOS with self-biased accumulation layer.
IEICE Electron. Express, 2020

2019
SiC trench MOSFET with integrated side-wall Schottky barrier diode having P<sup>+</sup> electric field shield.
IEICE Electron. Express, 2019

Simulation Study on Novel High Voltage Transient Voltage Suppression Diodes.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

A Low On-state Voltage and Large Current Capability Thin SOI-LIGBT with Trench NMOS.
Proceedings of the 13th IEEE International Conference on ASIC, 2019

Simulation Study of Trench IGBT with Diode-Clamped P-Well for High dI/dt and dV/dt Controllability.
Proceedings of the 13th IEEE International Conference on ASIC, 2019


  Loading...