Mrinmoy Ghosh
Orcid: 0000-0001-8515-0494
According to our database1,
Mrinmoy Ghosh
authored at least 26 papers
between 2004 and 2023.
Collaborative distances:
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Bibliography
2023
Proceedings of the 2023 ACM Symposium on Cloud Computing, SoCC 2023, 2023
2022
ACM Trans. Storage, 2022
I/O Workload Management for All-Flash Datacenter Storage Systems Based on Total Cost of Ownership.
IEEE Trans. Big Data, 2022
2021
Improving Performance of Flash Based Key-Value Stores Using Storage Class Memory as a Volatile Memory Extension.
Proceedings of the 2021 USENIX Annual Technical Conference, 2021
2016
A Fresh Perspective on Total Cost of Ownership Models for Flash Storage in Datacenters.
Proceedings of the 2016 IEEE International Conference on Cloud Computing Technology and Science, 2016
2015
Proceedings of the 6th ACM/SPEC International Conference on Performance Engineering, Austin, TX, USA, January 31, 2015
Proceedings of the 8th ACM International Systems and Storage Conference, 2015
Proceedings of the 2015 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems, 2015
2013
A structured approach to the simulation, analysis and characterization of smartphone applications.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013
2011
Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature.
Proceedings of the International Conference on Parallel Processing, 2011
2009
Performance analysis of compressed instruction sets on workloads targeted at mobile internet devices.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
J. Syst. Archit., 2008
Accurate system-level performance modeling and workload characterization for mobile internet devices.
Proceedings of the 9th workshop on MEmory performance, 2008
2007
Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007
Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007
2006
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006
Proceedings of the 2006 International Conference on Compilers, 2006
Proceedings of the Architecture of Computing Systems, 2006
2005
ACM SIGPLAN Notices, 2005
SIGARCH Comput. Archit. News, 2005
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation.
Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005
An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor.
Proceedings of the Second International Conference on Autonomic Computing (ICAC 2005), 2005
2004
CoolPression - a hybrid significance compression technique for reducing energy in caches.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.
Proceedings of the 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September, 2004