Dam Sunwoo

Orcid: 0000-0002-7291-0340

According to our database1, Dam Sunwoo authored at least 22 papers between 2007 and 2023.

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Bibliography

2023
Do Video Encoding Workloads Stress the Microarchitecture?
Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022
Practical Temporal Prefetching With Compressed On-Chip Metadata.
IEEE Trans. Computers, 2022

Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

Microarchitectural Performance Evaluation of AV1 Video Encoding Workloads.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022

2021
Re-establishing Fetch-Directed Instruction Prefetching: An Industry Perspective.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

2020
Securing Branch Predictors with Two-Level Encryption.
ACM Trans. Archit. Code Optim., 2020

Rebasing Instruction Prefetching: An Industry Perspective.
IEEE Comput. Archit. Lett., 2020

2019
Temporal Prefetching Without the Off-Chip Metadata.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Efficient metadata management for irregular data prefetching.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
BUQS: Battery- and user-aware QoS scaling for interactive mobile devices.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Cloud-Guided QoS and Energy Management for Mobile Interactive Web Applications.
Proceedings of the 4th IEEE/ACM International Conference on Mobile Software Engineering and Systems, 2017

Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2015
PowerTrain: A learning-based calibration of McPAT power models.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

2013
A structured approach to the simulation, analysis and characterization of smartphone applications.
Proceedings of the IEEE International Symposium on Workload Characterization, 2013

2012
Balancing DRAM locality and parallelism in shared memory CMP systems.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2010
PrEsto: An FPGA-accelerated Power Estimation Methodology for Complex Systems.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009
Accurate Functional-First Multicore Simulators.
IEEE Comput. Archit. Lett., 2009

QUICK: A flexible full-system functional model.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

2008
Parallelizing computer system simulators.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

2007
Early Models for System-Level Power Estimation.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

The FAST methodology for high-speed SoC/computer simulation.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007


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