Muhammad N. Marsono
Orcid: 0000-0002-7468-7461
According to our database1,
Muhammad N. Marsono
authored at least 77 papers
between 2006 and 2024.
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Bibliography
2024
Improved Feature Selection and Stream Traffic Classification Based on Machine Learning in Software-Defined Networks.
IEEE Access, 2024
2023
Motion Pattern-Based Scene Classification Using Adaptive Synthetic Oversampling and Fully Connected Deep Neural Network.
IEEE Access, 2023
3D-DNaPE: Dynamic Neighbor-Aware Performance Enhancement for Thermally Constrained 3D Many-Core Systems.
IEEE Access, 2023
Proceedings of the IEEE INFOCOM 2023, 2023
2022
RtFog: A Real-Time FPGA-Based Fog Node With Remote Dynamically Reconfigurable Application Plane for Fog Analytics Redeployment.
IEEE Trans. Green Commun. Netw., 2022
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Traffic Classification based on Incremental Learning Algorithms for the Software-Defined Networks.
Proceedings of the International Conference on Frontiers of Information Technology, 2022
2021
J. Supercomput., 2021
J. Netw. Comput. Appl., 2021
DPLBAnt: Improved load balancing technique based on detection and rerouting of elephant flows in software-defined networks.
Comput. Commun., 2021
Comput. Networks, 2021
PEW: Prediction-Based Early Dark Cores Wake-up Using Online Ridge Regression for Many-Core Systems.
IEEE Access, 2021
Proceedings of the IEEE Region 10 Conference, 2021
Early Flow Table Eviction Impact on Delay and Throughput in Software-Defined Networks.
Proceedings of the 11th IEEE International Conference on Control System, 2021
A Centralized Token-based Medium Access Control Mechanism for Wireless Network-on-Chip.
Proceedings of the International Conference on Artificial Intelligence and Computer Science Technology, 2021
2020
Collaborative Detection and Mitigation of Distributed Denial-of-Service Attacks on Software-Defined Network.
Mob. Networks Appl., 2020
Edge Computing Intelligence Using Robust Feature Selection for Network Traffic Classification in Internet-of-Things.
IEEE Access, 2020
2019
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
Quantum Inf. Process., 2018
A linked list run-length-based single-pass connected component analysis for real-time embedded hardware.
J. Real Time Image Process., 2018
Proceedings of the Sixth International Symposium on Computing and Networking, 2018
Proceedings of the 2018 10th Computer Science and Electronic Engineering Conference, 2018
2017
ProNoC: A low latency network-on-chip based many-core system-on-chip prototyping platform.
Microprocess. Microsystems, 2017
Hardware transactional memory architecture with adaptive version management for multi-processor FPGA platforms.
J. Syst. Archit., 2017
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017
2016
FPGA-Based Real-Time Moving Target Detection System for Unmanned Aerial Vehicle Application.
Int. J. Reconfigurable Comput., 2016
An FPGA-Based Quantum Computing Emulation Framework Based on Serial-Parallel Architecture.
Int. J. Reconfigurable Comput., 2016
Appl. Comput. Intell. Soft Comput., 2016
Proceedings of the 9th International Workshop on Network on Chip Architectures, 2016
A modular architecture for dynamically reconfigurable middlebox with customized reconfiguration handler.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016
2015
J. Netw. Syst. Manag., 2015
Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique.
Int. J. Reconfigurable Comput., 2015
Incorporating known malware signatures to classify new malware variants in network traffic.
Int. J. Netw. Manag., 2015
Circuits Syst. Signal Process., 2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015
A closed loop transmitting power self-calibration scheme for energy efficient WiNoC architectures.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the Second ACM IKDD Conference on Data Sciences, 2015
2014
Hardware implementation of evolvable block-based neural networks utilizing a cost efficient sigmoid-like activation function.
Neurocomputing, 2014
Optimization of structure and system latency in evolvable block-based neural networks using genetic algorithm.
Neurocomputing, 2014
Malware detection using augmented naive Bayes with domain knowledge and under presence of class noise.
Int. J. Inf. Comput. Secur., 2014
Network Partitioning Domain Knowledge Multiobjective Application Mapping for Large-Scale Network-on-Chip.
Appl. Comput. Intell. Soft Comput., 2014
Stateless Malware Packet Detection by Incorporating Naive Bayes with Known Malware Signatures.
Appl. Comput. Intell. Soft Comput., 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Proceedings of the 14th International Symposium on Communications and Information Technologies, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014
Proceedings of the Second International Symposium on Computing and Networking, 2014
2013
A Semi-Analytical Approach to Study the Energy Consumption of On-Chip Networks Testing.
J. Low Power Electron., 2013
Biometric encryption based on a fuzzy vault scheme with a fast chaff generation algorithm.
Future Gener. Comput. Syst., 2013
HW/SW co-design of reconfigurable hardware-based genetic algorithm in FPGAs applicable to a variety of problems.
Computing, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the Recent Advances in Intelligent Informatics, 2013
Co-simulation methodology for improved design and verification of hardware neural networks.
Proceedings of the IECON 2013, 2013
2012
Int. J. Netw. Manag., 2012
Proceedings of the Intelligent Informatics, 2012
Proceedings of the Intelligent Informatics, 2012
GA-based parameter tuning in finger-vein biometric embedded systems for information security.
Proceedings of the 2012 1st IEEE International Conference on Communications in China (ICCC), 2012
2011
Proceedings of the 2011 IEEE International Conference on Internet of Things (iThings) & 4th IEEE International Conference on Cyber, 2011
A Network-on-Chip simulation framework for homogeneous Multi-Processor System-on-Chip.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011
2010
Detecting Worms Using Data Mining Techniques: Learning in the Presence of Class Noise.
Proceedings of the Sixth International Conference on Signal-Image Technology and Internet-Based Systems, 2010
2009
J. Netw. Comput. Appl., 2009
Targeting spam control on middleboxes: Spam detection based on layer-3 e-mail content classification.
Comput. Networks, 2009
2008
Prioritized e-mail servicing to reduce non-spam delay and loss: A performance analysis.
Int. J. Netw. Manag., 2008
Binary LNS-based naive Bayes inference engine for spam control: noise analysis and FPGA implementation.
IET Comput. Digit. Tech., 2008
2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006