Mustafa Berke Yelten

Orcid: 0000-0001-7482-0536

According to our database1, Mustafa Berke Yelten authored at least 38 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Radiation-aware analog circuit design via fully-automated simulation environment.
Integr., May, 2023

A highly-linear, sub-mW LNA at 2.4 GHz in 40 nm CMOS process.
Integr., 2023

Modeling the Avalanche Breakdown of the FMMT417 NPN BJT in the TINA Environment.
Proceedings of the 19th International Conference on Synthesis, 2023

Shunt-Shunt Feedback Inverter Transimpedance Amplifier Design for Capsule Endoscopy.
Proceedings of the 19th International Conference on Synthesis, 2023

A 432 MHz Class-D Power Amplifier with 60% Power Efficiency for Wireless Capsule Endoscopy.
Proceedings of the 19th International Conference on Synthesis, 2023

High-Performance Wideband 0.25 μm GaAs pHEMT 6-Bit Digital Phase Shifter Design for C-Band Phased Array Applications.
Proceedings of the 19th International Conference on Synthesis, 2023

A 560 MHz Frequency Multiplier Employing a Novel Pseudo-Differential Charge-Pump PLL.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Linearity Issues in Dual Input Doherty-Outphasing Hybrid Power Amplifier Topology.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

10W Power Amplifier Design for sub-6GHz 5G Band via Virtual Gain Optimization.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
Holistic Device Modeling: Toward a Unified MOSFET Model Including Variability, Aging, and Extreme Operating Conditions.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Simulation Tool for Space Applications: RadiSPICE.
Proceedings of the 18th International Conference on Synthesis, 2022

Responsivity Comparison of Different Photodiode Structures.
Proceedings of the 18th International Conference on Synthesis, 2022

A Noise-Canceling TIA Topology Compatible With Large-Area Photodetectors in 40 nm CMOS Process.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

A Power-Efficient Magnetic Actuator Driver Design.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
An Automated Setup for the Characterization of Time-Based Degradation Effects Including the Process Variability in 40-nm CMOS Transistors.
IEEE Trans. Instrum. Meas., 2021

Design of a Constant Current Laser Driver for Biomedical Applications.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

An ISM-Band Multi-Phase Injection-Locked Ring Oscillator.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020
A High Performance TIA Design in 40 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
On Chip Reconfigurable CMOS Analog Circuit Design and Automation Against Aging Phenomena: Sense and React.
ACM Trans. Design Autom. Electr. Syst., 2019

Design of Cryogenic LNAs for High Linearity in Space Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process.
Proceedings of the 16th International Conference on Synthesis, 2019

Hysteretic Buck-Boost Converter for Wearable Applications.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

2018
Reliability Testing of 3D-Printed Electromechanical Scanning Devices.
J. Electron. Test., 2018

A Novel Multiple Membership Function Generator for Fuzzy Logic Systems.
Proceedings of the 15th International Conference on Synthesis, 2018

Design of Logic Gates by Using a Four-Gate Thin Film Transistor (FG TFT).
Proceedings of the 15th International Conference on Synthesis, 2018

A Rare Event Based Yield Estimation Methodology for Analog Circuits.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
Aging signature properties and an efficient signature determination tool for online monitoring.
Integr., 2017

A cryogenic modeling methodology of MOSFET I-V characteristics in BSIM3.
Proceedings of the 14th International Conference on Synthesis, 2017

Review: Analog design methodologies for reliability in nanoscale CMOS circuits.
Proceedings of the 14th International Conference on Synthesis, 2017

A 0.18 μm CMOS X-Band Low Noise Amplifier for Space Applications.
Proceedings of the New Generation of CAS, 2017

A high linearity LNA using 180 nm CMOS technology for S-Band.
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017

2016
Efficient signature selection tool for sense & react systems.
Proceedings of the 13th International Conference on Synthesis, 2016

A heuristic sensitivity analysis technique for high-dimensional systems.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2013
Scalable and efficient analog parametric fault identification.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

2012
Process mismatch analysis based on reduced-order models.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2011
Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models.
Proceedings of the Simulation and Modeling Methodologies, Technologies and Applications, 2011

Application of Surrogate Modeling in Variation-aware Macromodel and Circuit Design.
Proceedings of the SIMULTECH 2011 - Proceedings of 1st International Conference on Simulation and Modeling Methodologies, Technologies and Applications, Noordwijkerhout, The Netherlands, 29, 2011

2009
Theoretical analysis and characterization of the tunable matching networks in low noise amplifiers.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009


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