N. Burgess

According to our database, N. Burgess authored at least 6 papers between 1984 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2000

Implementing 1, 024-Bit RSA Exponentiation on a 32-Bit Processor Core.

B. J. Phillips, N. Burgess

Proceedings of the 12th IEEE International Conference on Application-Specific Systems, 2000

1997

Representations of Serial Order.

Richard N. A. Henson, N. Burgess

Proceedings of the Connectionist Representations: 4th Neural Computation and Psychology Workshop, 1997

1991

The Patricia testability analysis tool.

M. Hadjinicolaeu, N. Burgess, Donatella Sciuto, G. Buananno, Patrizia Cavalloro, Giuseppe Zaza

Microprocessing and Microprogramming, 1991

A Fast Division Algorithm for VLSI.

N. Burgess

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1987

MOS Test Pattern Generation Using Path Algebras.

Robert I. Damper, N. Burgess

IEEE Trans. Computers, 1987

1984

The inadequacy of the stuck-at fault model for testing mos lsi circuits: a review of mos failure mechanisms and some implications for computer-aided design and test of mos lsi circuits.

N. Burgess, Robert I. Damper

Softw. Microsystems, 1984