Patrizia Cavalloro

According to our database, Patrizia Cavalloro authored at least 12 papers between 1991 and 2001.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2001

C/C++: progress or deadlock in system-level specification.

Daniel Gajski, Eugenio Villar, Wolfgang Rosenstiel, Vassilios Gerousis, D. Barton, Jonas Plantin, S. E. Ericsson, Patrizia Cavalloro, Gjalt G. de Jong

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

1998

ATM Cell Modelling using Objective VHDL.

Alberto Allara, Massimo Bombana, Patrizia Cavalloro, Wolfgang Nebel, Wolfram Putzke-Röming, Martin Radetzki

Proceedings of the ASP-DAC '98, 1998

1997

Property verification in the design of telecom applications.

Massimo Bombana, Patrizia Cavalloro, Fabrizio Ferrandi

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997

1995

Design-Flow and Synthesis for ASICs: A Case Study.

Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Roger B. Hughes, Gerry Musgrave, Giuseppe Zaza

Proceedings of the 32st Conference on Design Automation, 1995

1994

ALADIN: a multilevel testability analyzer for VLSI system design.

Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza

IEEE Trans. Very Large Scale Integr. Syst., 1994

Quantitative Evaluation of Formal Based Synthesis in ASIC Design.

G. Bezzi, Massimo Bombana, Patrizia Cavalloro, Salvatore Conigliaro, Giuseppe Zaza

Proceedings of the Theorem Provers in Circuit Design, 1994

1993

A design methodology for the correct specification of VLSI systems.

Cristiana Bolchini, Massimo Bombana, Patrizia Cavalloro, Claudio Costi, Franco Fummi, Giuseppe Zaza

Microprocess. Microprogramming, 1993

An Expert Solution to Functional Testability Analysis of VLSI Circuits.

Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza

Proceedings of the SEKE'93, 1993

Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks.

Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Fabrizio Ferrandi, Donatella Sciuto, Giuseppe Zaza

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

1992

Specification and Formal Synthesis of Digital Circuits.

Massimo Bombana, Patrizia Cavalloro, Giuseppe Zaza

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992

A multi level testability assistant for VLSI design.

Massimo Bombana, Giacomo Buonanno, Patrizia Cavalloro, Donatella Sciuto, Giuseppe Zaza

Proceedings of the conference on European design automation, 1992

1991

The Patricia testability analysis tool.

M. Hadjinicolaeu, N. Burgess, Donatella Sciuto, G. Buananno, Patrizia Cavalloro, Giuseppe Zaza

Microprocessing and Microprogramming, 1991