Nagesh B. Lakshminarayana

According to our database, Nagesh B. Lakshminarayana authored at least 9 papers between 2008 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2015

Efficient graph algorithm execution on data-parallel architectures.

Nagesh B. Lakshminarayana

PhD thesis, 2015

Block-Precise Processors: Low-Power Processors with Reduced Operand Store Accesses and Result Broadcasts.

Nagesh B. Lakshminarayana, Hyesoon Kim

IEEE Trans. Computers, 2015

2014

Power Modeling for GPU Architectures Using McPAT.

Jieun Lim, Nagesh B. Lakshminarayana, Hyesoon Kim, William J. Song, Sudhakar Yalamanchili, Wonyong Sung

ACM Trans. Design Autom. Electr. Syst., 2014

Spare register aware prefetching for graph algorithms on GPUs.

Nagesh B. Lakshminarayana, Hyesoon Kim

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013

SD3: An Efficient Dynamic Data-Dependence Profiling Mechanism.

Minjang Kim, Nagesh B. Lakshminarayana, Hyesoon Kim, Chi-Keung Luk

IEEE Trans. Computers, 2013

2012

DRAM Scheduling Policy for GPGPU Architectures Based on a Potential Function.

Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim, Jinwoo Shin

IEEE Comput. Archit. Lett., 2012

2010

Many-Thread Aware Prefetching Mechanisms for GPGPU Applications.

Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim, Richard W. Vuduc

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009

Age based scheduling for asymmetric multiprocessors.

Nagesh B. Lakshminarayana, Jaekyu Lee, Hyesoon Kim

Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009

2008

Understanding performance, power and energy behavior in asymmetric multiprocessors.

Nagesh B. Lakshminarayana, Hyesoon Kim

Proceedings of the 26th International Conference on Computer Design, 2008