Nihar Hage

According to our database, Nihar Hage authored at least 6 papers between 2016 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

In-situ Monitoring for Slack Time Violation Without Performance Penalty.

Nihar Hage, Satyadev Ahlawat, Virendra Singh

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

On Testing of Superscalar Processors in Functional Mode for Delay Faults.

Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

On Generation of Delay Test with Capture Power Safety.

Rohini Gulve, Nihar Hage

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

Instruction-based self-test for delay faults maximizing operating temperature.

Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Achieving full functional coverage for the forwarding unit of pipelined processors.

V. S. Vineesh, Nihar Hage, B. Karthik, Virendra Singh

Proceedings of the 2017 IEEE East-West Design & Test Symposium, 2017

2016

On determination of instantaneous peak and cycle peak switching using ILP.

Rohini Gulve, Nihar Hage, Jaynarayan T. Tudu

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016