Ning Li

Affiliations:
  • Fudan University, State Key Laboratory of ASIC and System, Shanghai, China


According to our database1, Ning Li authored at least 35 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2018
A 5-to-8-GHz Wideband Miniaturized Dielectric Spectroscopy Chip With $I/Q$ Mismatch Calibration in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018

2017
A 7GHz-bandwidth 31.5 GHz FMCW-PLL with novel twin-VCOs structure in 65nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A programmable divider with extended division range for 24GHz FMCW frequency synthesizer.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015
A Monolithic Sub-sampling PLL based 6-18 GHz Frequency Synthesizer for C, X, Ku Band Communication.
IEICE Trans. Electron., 2015

A 30-GHz to 39-GHz mm-Wave low-power injection-locked frequency divider in 65nm CMOS.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A 1.5-GS/s 5-bit interpolating ADC with offset averaging and interpolating sharing resistors network.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013
A Dividerless PLL With Low Power and Low Reference Spur by Aperture-Phase Detector and Phase-to-Analog Converter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

A 0.13-µm CMOS 0.1-12GHz active balun-LNA for multi-standard applications.
IEICE Electron. Express, 2013

Automatic gain control algorithm with high-speed and double closed-loop in UWB system.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

Low-complexity synchronizer used in DC-OFDM UWB system.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
A 2.4GHz to 3.86GHz digitally controlled oscillator with 18.5kHz frequency resolution using single PMOS varactor.
IEICE Electron. Express, 2012

A 1.2 V 1.0-GS/s 8-bit Voltage-Buffer-Free Folding and interpolating ADC.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A cancellation technique for output-dependent delay differences in high-accuracy DACs.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A digitally calibrated current-steering DAC with current-splitting array.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A time-to-digital converter based AFC for wideband frequency synthesizer.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Output-dependent delay cancellation technique for high-accuracy current-steering DACs.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A Frequency Synthesizer With Optimally Coupled QVCO and Harmonic-Rejection SSBmixer for Multi-Standard Wireless Receiver.
IEEE J. Solid State Circuits, 2011

A 22-mW 2.2%-EVM UWB Transmitter Using On-Chip Transformer and LO Leakage Calibration.
IEICE Trans. Electron., 2011

A 5.5mW 80-400MHz Gm-C low pass filter with a unique auto-tuning system.
IEICE Electron. Express, 2011

A 6.2-9.5 GHz receiver for Wimedia MB-OFDM and China UWB standard.
Sci. China Inf. Sci., 2011

A current-mode RF transmitter for 6-9 GHz MB-OFDM UWB application.
Sci. China Inf. Sci., 2011

A dual-mode VCO based low-power synthesizer with optimized automatic frequency calibration for software-defined radio.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Nyquist-rate time-interleaved current-steering DAC with dynamic channel matching.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A 2.1-GHz PLL with -80dBc/-74dBc reference spur based on aperture-phase detector and phase-to-analog converter.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011

A 80-400 MHz 74 dB-DR Gm-C low-pass filter with a unique auto-tuning system.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

A 1.2 V 70 mA low drop-out voltage regulator in 0.13 µm CMOS process.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

Low phase noise injection-locked doubler-based quadrature CMOS VCO.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A 4-channel 8-bit 650-MSample/s DAC with interpolation filter for embedded application.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A low-voltage differential injection locked divider with forward body bias.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
A 0.22 pJ/step subsampling ADC with fast input-tracking sampling and simplified opamp sharing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A fractional-N frequency synthesizer for cellular and short range multi-standard wireless receiver.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A current-mode 6-9GHz UWB transmitter with output power flattening technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A sideband-suppressed low-power synthesizer for 14-band dual-carrier MB-OFDM UWB transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Novel Operational Amplifier for Low-voltage Low-power SC Circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007
A Power-Optimized CMOS Quadrature VCO with Wide-Tuning Range for UWB Receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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