Nitya Ranganathan

According to our database1, Nitya Ranganathan authored at least 6 papers between 2004 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
SPOILER-GUARD: Gating Latency Effects of Memory Accesses through Randomized Dependency Prediction.
Proceedings of the Design, Automation & Test in Europe Conference, 2026

2009
Analysis of the TRIPS prototype block predictor.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2009

An evaluation of the TRIPS computer system.
Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems, 2009

2007
Composable Lightweight Processors.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

2006
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2004
TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP.
ACM Trans. Archit. Code Optim., 2004


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