Rajagopalan Desikan

According to our database1, Rajagopalan Desikan authored at least 6 papers between 2001 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2006
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

Design and Implementation of the TRIPS Primary Memory System.
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

2004
Scalable Hardware Memory Disambiguation for High-ILP Processors.
IEEE Micro, 2004

Scalable selective re-execution for EDGE architectures.
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2002
Errata on "Measuring Experimental Error in Microprocessor Simulation".
SIGARCH Comput. Archit. News, 2002

2001
Measuring Experimental Error in Microprocessor Simulation.
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001


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