Madhu Saravana Sibi Govindan

According to our database1, Madhu Saravana Sibi Govindan authored at least 8 papers between 2006 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Scaling Power and Performance viaProcessor Composability.
IEEE Trans. Computers, 2014

2013
Automating Stressmark Generation for Testing Processor Voltage Fluctuations.
IEEE Micro, 2013

How to implement effective prediction and forwarding for fusable dynamic multicore architectures.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012
AUDIT: Stress Testing the Automatic Way.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

2011
Exploiting criticality to reduce bottlenecks in distributed uniprocessors.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2009
End-to-end validation of architectural power models.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

2007
Composable Lightweight Processors.
Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-40 2007), 2007

2006
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006


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