Takao Toi

According to our database, Takao Toi authored at least 12 papers between 1999 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2024

20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot Applications.

Koichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2021

A CMOS Image Sensor and an AI Accelerator for Realizing Edge-Computing-Based Surveillance Camera Systems.

Fukashi Morishita, Norihito Kato, Satoshi Okubo, Takao Toi, Mitsuru Hiraki, Sugako Otani, Hideaki Abe, Yuji Shinohara, Hiroyuki Kondo

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2018

New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications.

Taro Fujii, Takao Toi, Teruhito Tanaka, Katsumi Togawa, Toshiro Kitaoka, Kengo Nishino, Noritsugu Nakamura, Hiroki Nakahara, Masato Motomura

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2013

Optimizing time and space multiplexed computation in a dynamically reconfigurable processor.

Takao Toi, Noritsugu Nakamura, Taro Fujii, Toshiro Kitaoka, Katsumi Togawa, Koichiro Furuta, Toru Awashima

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

2011

Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor.

Takao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

2010

High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor.

Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi

IPSJ Trans. Syst. LSI Des. Methodol., 2010

Wire congestion aware synthesis for a dynamically reconfigurable processor.

Takao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano

Proceedings of the International Conference on Field-Programmable Technology, 2010

2006

High-level synthesis challenges and solutions for a dynamically reconfigurable processor.

Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing

Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

An adaptive Viterbi decoder on the dynamically reconfigurable processor.

Shohei Abe, Yohei Hasegawa, Takao Toi, Takeshi Inuo, Hideharu Amano

Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

2004

Stream applications on the dynamically reconfigurable processor.

Masayasu Suzuki, Yohei Hasegawa, Yutaka Yamada, Naoto Kaneko, Katsuaki Deguchi, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takao Toi, Toru Awashima

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004

2000

Color signal processing technique for single-chip CCD cameras that employ CPUs with SIMD instruction sets.

Takao Toi

IEEE Trans. Consumer Electron., 2000

1999

A subband coding technique for image compression in single CCD cameras with Bayer color filter arrays.

Takao Toi, M. Ohita

IEEE Trans. Consumer Electron., 1999