Nupur Navlakha

According to our database, Nupur Navlakha authored at least 2 papers between 2013 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Emerging FETs for Low Power and High Speed Embedded Dynamic Random Access Memory.

Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2013

Architectural Level Sub-threshold Leakage Power Estimation of SRAM Arrays with its Peripherals.

Nupur Navlakha, Lokesh Garg, Dharmendar Boolchandani, Vineet Sahula

Proceedings of the VLSI Design and Test, 17th International Symposium, 2013