O. Kebichi

According to our database1, O. Kebichi authored at least 6 papers between 1992 and 1995.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

1995
Exact Aliasing Computation for RAM BIST.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Area versus detection latency trade-offs in self-checking memory design.
Proceedings of the 1995 European Design and Test Conference, 1995

1994
Trade-offs in scan path and BIST implementations for RAMs.
J. Electron. Test., 1994

Zero aliasing ROM BIST.
J. Electron. Test., 1994

Aliasing-free Signature Analysis for RAM BIST.
Proceedings of the Proceedings IEEE International Test Conference 1994, 1994

1992
A Tool for Automatic Generation of BISTed and Transparent BISTed Rams.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992


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