Oscar Garnica
Orcid: 0000-0001-5064-2587
According to our database1,
Oscar Garnica
authored at least 61 papers
between 2001 and 2023.
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Bibliography
2023
Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023
Hardware design of a model generator based on grammars and cartesian genetic programming for blood glucose prediction.
Proceedings of the Companion Proceedings of the Conference on Genetic and Evolutionary Computation, 2023
2022
Blood glucose prediction using multi-objective grammatical evolution: analysis of the "agnostic" and "what-if" scenarios.
Genet. Program. Evolvable Mach., 2022
Approaching epistemic and aleatoric uncertainty with evolutionary optimization: examples and challenges.
Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Companion Volume, Boston, Massachusetts, USA, July 9, 2022
Combining the Properties of Random Forest with Grammatical Evolution to Construct Ensemble Models.
Proceedings of the Applications of Evolutionary Computation - 25th European Conference, 2022
Obtaining Difference Equations for Glucose Prediction by Structured Grammatical Evolution and Sparse Identification.
Proceedings of the Computer Aided Systems Theory - EUROCAST 2022, 2022
2021
Ensemble Models of Cutting-Edge Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes.
Sensors, 2021
A Critical Review of the state-of-the-art on Deep Neural Networks for Blood Glucose Prediction in Patients with Diabetes.
CoRR, 2021
Glucose forecasting using genetic programming and latent glucose variability features.
Appl. Soft Comput., 2021
Estimation of Grain-Level Residual Stresses in a Quenched Cylindrical Sample of Aluminum Alloy AA5083 Using Genetic Programming.
Proceedings of the Applications of Evolutionary Computation, 2021
2020
Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Noise spectral analysis and error estimation of continuous glucose monitors under real-life conditions of diabetes patients.
Biomed. Signal Process. Control., 2020
Glucose forecasting combining Markov chain based enrichment of data, random grammatical evolution and Bagging.
Appl. Soft Comput., 2020
Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020
Short and Medium Term Blood Glucose Prediction Using Multi-objective Grammatical Evolution.
Proceedings of the Applications of Evolutionary Computation - 23rd European Conference, 2020
2019
Proceedings of the Genetic and Evolutionary Computation Conference, 2019
Determination of microscopic residual stresses using diffraction methods, EBSD maps, and evolutionary algorithms.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019
2018
Combining data augmentation, EDAs and grammatical evolution for blood glucose forecasting.
Memetic Comput., 2018
Comparing three online evolvable hardware implementations of a classification system.
Genet. Program. Evolvable Mach., 2018
Identification of Models for Glucose Blood Values in Diabetics by Grammatical Evolution.
Proceedings of the Handbook of Grammatical Evolution, 2018
2017
J. Medical Syst., 2017
Forecasting glucose levels in patients with diabetes mellitus using semantic grammatical evolution and symbolic aggregate approximation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017
Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting.
Proceedings of the Applications of Evolutionary Computation - 20th European Conference, 2017
Data augmentation and evolutionary algorithms to improve the prediction of blood glucose levels in scarcity of training data.
Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017
2016
Soft Comput., 2016
Compilable Phenotypes: Speeding-Up the Evaluation of Glucose Models in Grammatical Evolution.
Proceedings of the Applications of Evolutionary Computation - 19th European Conference, 2016
2015
Proceedings of the Genetic and Evolutionary Computation Conference, 2015
Optimizing Performance of L1 Cache Memory for Embedded Systems driven by Differential Evolution.
Proceedings of the Genetic and Evolutionary Computation Conference, 2015
2014
Proceedings of the Genetic and Evolutionary Computation Conference, 2014
Clarke and parkes error grid analysis of diabetic glucose models obtained with evolutionary computation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2014
2013
Concurr. Comput. Pract. Exp., 2013
2011
Microprocess. Microsystems, 2011
2010
A parallel evolutionary algorithm to optimize dynamic memory managers in embedded systems.
Parallel Comput., 2010
Proceedings of the SummerSim '10, 2010
Parisian Approach - Reducing Computational Effort to Improve SMT Performance by setting Resizable Caches.
Proceedings of the ICEC 2010 - Proceedings of the International Conference on Evolutionary Computation, [part of the International Joint Conference on Computational Intelligence IJCCI 2010], Valencia, Spain, October 24, 2010
Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution.
Proceedings of the Genetic and Evolutionary Computation Conference, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
2009
Characterizing asynchronous variable latencies through probability distribution functions.
Microprocess. Microsystems, 2009
Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems.
Proceedings of the Genetic and Evolutionary Computation Conference, 2009
Improving SMT performance: an application of genetic algorithms to configure resizable caches.
Proceedings of the Genetic and Evolutionary Computation Conference, 2009
2008
Int. J. High Perform. Syst. Archit., 2008
Proceedings of the 16th Euromicro International Conference on Parallel, 2008
Proceedings of the Genetic and Evolutionary Computation Conference, 2008
2007
Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders.
IET Comput. Digit. Tech., 2007
Proceedings of the High Performance Embedded Architectures and Compilers, 2007
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006
Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
2005
Proceedings of the Integrated Circuit and System Design, 2005
2004
Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays.
Proceedings of the 12th Euromicro Workshop on Parallel, 2004
Enhancing GALS Processor Performance Using Data Classification Based on Data Latency.
Proceedings of the Integrated Circuit and System Design, 2004
2003
Proceedings of the 11th Euromicro Workshop on Parallel, 2003
Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization.
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the Genetic and Evolutionary Computation, 2003
2002
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation.
Fundam. Informaticae, 2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
2001
A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001