Juan Lanchares

According to our database1, Juan Lanchares authored at least 66 papers between 1997 and 2019.

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Bibliography

2019
Determination of microscopic residual stresses using diffraction methods, EBSD maps, and evolutionary algorithms.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

Determination of microscopic residual stresses using evolutionary algorithms.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

Can clustering improve glucose forecasting with genetic programming models?
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

2018
Combining data augmentation, EDAs and grammatical evolution for blood glucose forecasting.
Memetic Computing, 2018

Identification of Models for Glucose Blood Values in Diabetics by Grammatical Evolution.
Proceedings of the Handbook of Grammatical Evolution, 2018

2017
Data Based Prediction of Blood Glucose Concentrations Using Evolutionary Methods.
J. Medical Systems, 2017

Forecasting glucose levels in patients with diabetes mellitus using semantic grammatical evolution and symbolic aggregate approximation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2017

Enhancing Grammatical Evolution Through Data Augmentation: Application to Blood Glucose Forecasting.
Proceedings of the Applications of Evolutionary Computation - 20th European Conference, 2017

Data augmentation and evolutionary algorithms to improve the prediction of blood glucose levels in scarcity of training data.
Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017

2016
Optimizing L1 cache for embedded systems through grammatical evolution.
Soft Comput., 2016

Compilable Phenotypes: Speeding-Up the Evaluation of Glucose Models in Grammatical Evolution.
Proceedings of the Applications of Evolutionary Computation - 19th European Conference, 2016

2015
Data-Based Identification of Prediction Models for Glucose.
Proceedings of the Genetic and Evolutionary Computation Conference, 2015

Optimizing Performance of L1 Cache Memory for Embedded Systems driven by Differential Evolution.
Proceedings of the Genetic and Evolutionary Computation Conference, 2015

2014
A methodology to automatically optimize dynamic memory managers applying grammatical evolution.
J. Syst. Softw., 2014

Solving GA-hard problems with EMMRS and GPGPUs.
Proceedings of the Genetic and Evolutionary Computation Conference, 2014

Clarke and parkes error grid analysis of diabetic glucose models obtained with evolutionary computation.
Proceedings of the Genetic and Evolutionary Computation Conference, 2014

2013
A review of bioinspired computer-aided design tools for hardware design.
Concurrency and Computation: Practice and Experience, 2013

2012
Introduction.
Proceedings of the Parallel Architectures and Bioinspired Algorithms, 2012

Special issue on evolutionary computation on general purpose graphics processing units.
Soft Comput., 2012

2011
A phase adaptive cache hierarchy for SMT processors.
Microprocess. Microsystems, 2011

2010
Parallel and Distributed Optimization of Dynamic Data Structures for Multimedia Embedded Systems.
Proceedings of the Parallel and Distributed Computational Intelligence, 2010

Parallel Architectures and Bioinspired Algorithms.
Parallel Comput., 2010

Simulating a LAGS processor to consider variable latency on L1 D-Cache.
Proceedings of the SummerSim '10, 2010

Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution.
Proceedings of the Genetic and Evolutionary Computation Conference, 2010

Adaptive Cache Memories for SMT Processors.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Characterizing asynchronous variable latencies through probability distribution functions.
Microprocess. Microsystems, 2009

Optimization methodology of dynamic data structures based on genetic algorithms for multimedia embedded systems.
J. Syst. Softw., 2009

Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems.
Proceedings of the Genetic and Evolutionary Computation Conference, 2009

2008
A parallel evolutionary algorithm to optimize dynamic data types in embedded systems.
Soft Comput., 2008

Particle swarm optimisation of memory usage in embedded systems.
IJHPSA, 2008

Modelling Asynchronous Systems using Probability Distribution Functions.
Proceedings of the 16th Euromicro International Conference on Parallel, 2008

Optimization of dynamic data types in embedded systems using DEVS/SOA-based modeling and simulation.
Proceedings of the 3rd International ICST Conference on Scalable Information Systems, 2008

Solving discrete deceptive problems with EMMRS.
Proceedings of the Genetic and Evolutionary Computation Conference, 2008

Analysis of multi-objective evolutionary algorithms to optimize dynamic data types in embedded systems.
Proceedings of the Genetic and Evolutionary Computation Conference, 2008

Design Flow of Dynamically-Allocated Data Types in Embedded Applications Based on Elitist Evolutionary Computation Optimization.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders.
IET Computers & Digital Techniques, 2007

Optimization of dynamic data structures in multimedia embedded systems using evolutionary computation.
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007

Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches.
Proceedings of the High Performance Embedded Architectures and Compilers, 2007

Is the island model fault tolerant?
Proceedings of the Genetic and Evolutionary Computation Conference, 2007

Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors.
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007

2006
A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions.
Proceedings of the Euro-Par 2006, Parallel Processing, 12th International Euro-Par Conference, Dresden, Germany, August 28, 2006

A Power-Aware Technique for Functional Units in High-Performance Processors.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2005
Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width.
Proceedings of the Integrated Circuit and System Design, 2005

2004
Annealing placement by thermodynamic combinatorial optimization.
ACM Trans. Design Autom. Electr. Syst., 2004

A methodology for reconfigurable hardware design based upon evolutionary computation.
Microprocessors and Microsystems, 2004

Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays.
Proceedings of the 12th Euromicro Workshop on Parallel, 2004

2003
Hybrid Parallelization of a Compact Genetic Algorithm.
Proceedings of the 11th Euromicro Workshop on Parallel, 2003

Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization.
Proceedings of the Integrated Circuit and System Design, 2003

Multi-FPGA Systems Synthesis by Means of Evolutionary Computation.
Proceedings of the Genetic and Evolutionary Computation, 2003

2002
Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation.
Fundam. Inform., 2002

A New Methodology to Design Low-Power Asynchronous Circuits.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Transformation of Equational Specification by Means of Genetic Programming.
Proceedings of the Genetic Programming, 5th European Conference, 2002

Optimization of Equational Specifications Using Genetic Techniques.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

A Hybrid Evolutionary Algorithm for Multi-FPGA Systems Design.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

FPGA Placement by Thermodynamic Combinatorial Optimization.
Proceedings of the 2002 Design, 2002

2001
A Parallel Compact Genetic Algorithm for Multi-FPGA Partitioning.
Proceedings of the Ninth Euromicro Workshop on Parallel and Distributed Processing, 2001

Pipelined Genetic Architecture with Fitness on the Fly.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000
Adaptive FPGA Placement by Natural Optimization.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000

Partitioning and Placement for Multi-FPGA Systems Using Genetic Algorithms.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000

1999
A Method for Model Parameter Identification Using Parallel Genetic Algorithms.
Proceedings of the Recent Advances in Parallel Virtual Machine and Message Passing Interface, 1999

Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing.
Proceedings of the 24th EUROMICRO '98 Conference, 1998

1997
Functional Partitioning for Hardware-Software Codesign using Genetic Algorithms.
Proceedings of the 23rd EUROMICRO Conference '97, 1997


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