Pablo Navarro-Torrero

According to our database, Pablo Navarro-Torrero authored at least 3 papers between 2024 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2025

A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519.

Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox Jiménez

IEEE Access, 2025

2024

Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems.

Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox

Proceedings of the 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024

Cryptographic Security Through a Hardware Root of Trust.

Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox

Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2024