Pascal Witte
According to our database^{1},
Pascal Witte
authored at least 9 papers
between 2009 and 2014.
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Bibliography
2014
A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/convstep in a 25 MHz BW.
IEEE J. Solid State Circuits, 2014
2012
A 72dBDR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW.
Proceedings of the 2012 IEEE International SolidState Circuits Conference, 2012
An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
2011
A CorrelationBased Background Error Estimation Technique for Bandpass DeltaSigma ADC DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2011
An 8.5 mW ContinuousTime ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.
IEEE J. Solid State Circuits, 2011
An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization.
Proceedings of the IEEE International SolidState Circuits Conference, 2011
2010
Background DAC Error Estimation Using a Pseudo Random Noise Based Correlation Technique for SigmaDelta AnalogtoDigital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
Hardware complexity of a correlation based background DAC error estimation technique for sigmadelta ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
A Background DAC Error Estimation in SigmaDelta ADCs using a Pseudo Random Noise based Correlation Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009