Pascal Witte

According to our database1, Pascal Witte authored at least 9 papers between 2009 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2014
A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW.
IEEE J. Solid State Circuits, 2014

2012
A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

An error estimation technique for lowpass and bandpass ΣΔ ADC feedback DACs using a residual test signal.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A Correlation-Based Background Error Estimation Technique for Bandpass Delta-Sigma ADC DACs.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.
IEEE J. Solid State Circuits, 2011

An 8mW 50MS/s CT ΔΣ modulator with 81dB SFDR and digital background DAC linearization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2010
Background DAC Error Estimation Using a Pseudo Random Noise Based Correlation Technique for Sigma-Delta Analog-to-Digital Converters.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Hardware complexity of a correlation based background DAC error estimation technique for sigma-delta ADCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
A Background DAC Error Estimation in Sigma-Delta ADCs using a Pseudo Random Noise based Correlation Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


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