Patrick Marlier

According to our database1, Patrick Marlier authored at least 16 papers between 2007 and 2018.

Collaborative distances:



In proceedings 
PhD thesis 





Boosting Transactional Memory with Stricter Serializability.
Proceedings of the Coordination Models and Languages, 2018

Supporting Time-Based QoS Requirements in Software Transactional Memory.
ACM Trans. Parallel Comput., 2015

Evaluating HTM for Pauseless Garbage Collectors in Java.
Proceedings of the 2015 IEEE TrustCom/BigDataSE/ISPA, 2015

Read-log-update: a lightweight synchronization mechanism for concurrent programming.
Proceedings of the 25th Symposium on Operating Systems Principles, 2015

The TURBO Diaries: Application-controlled Frequency Scaling Explained.
Proceedings of the Software Engineering & Management 2015, Multikonferenz der GI-Fachbereiche Softwaretechnik (SWT) und Wirtschaftsinformatik (WI), FA WI-MAW, 17. März, 2015

A performance study of Java garbage collectors on multicore architectures.
Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, 2015

Speculative Concurrent Processing with Transactional Memory in the Actor Model.
Proceedings of the Principles of Distributed Systems - 17th International Conference, 2013

Efficient transactional memory runtimes for unmanaged environments.
PhD thesis, August, 2011

Optimizing hybrid transactional memory: the importance of nonspeculative operations.
Proceedings of the SPAA 2011: Proceedings of the 23rd Annual ACM Symposium on Parallelism in Algorithms and Architectures, 2011

Deadline-aware scheduling for Software Transactional Memory.
Proceedings of the 2011 IEEE/IFIP International Conference on Dependable Systems and Networks, 2011

Time-Based Software Transactional Memory.
IEEE Trans. Parallel Distrib. Syst., 2010

The Velox Transactional Memory Stack.
IEEE Micro, 2010

Brief Announcement: Hybrid Time-Based Transactional Memory.
Proceedings of the Distributed Computing, 24th International Symposium, 2010

Scheduling support for transactional memory contention management.
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2010

Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack.
Proceedings of the European Conference on Computer Systems, 2010

Experimental Assessment of V2V and I2V Communications.
Proceedings of the IEEE 4th International Conference on Mobile Adhoc and Sensor Systems, 2007