Pawel Kerntopf

According to our database1, Pawel Kerntopf authored at least 25 papers between 1974 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Optimization of LNN Reversible Circuits Using an Analytic Sifting Method.
J. Circuits Syst. Comput., 2021

2020
Research on Reversible Functions Having Component Functions with Specified Properties: An Overview.
Proceedings of the Reversible Computation: Extending Horizons of Computing, 2020

2018
Ternary/MV Reversible Functions with Component Functions from Different Equivalence Classes.
Proceedings of the 48th IEEE International Symposium on Multiple-Valued Logic, 2018

2017
Study of Reversible Ternary Functions with Homogeneous Component Functions.
Proceedings of the 47th IEEE International Symposium on Multiple-Valued Logic, 2017

2016
Encryption using reconfigurable reversible logic gate and its simulation in FPGAs.
Proceedings of the 2016 MIXDES, 2016

2014
Synthesis of Reversible Circuits Based on EXORs of Products of EXORs.
Trans. Comput. Sci., 2014

Analysis of Faults in Reversible Computing.
Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

Minimizing Reversible Circuits in the 2n Scheme Using Two and Three Bits Patterns.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Synthesis of Reversible Circuits Based on Products of Exclusive OR Sums.
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Analysis of Reversible and Quantum Finite State Machines Using Homing, Synchronizing and Distinguishing Input Sequences.
Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

2012
Optimal 4-bit Reversible Mixed-Polarity Toffoli Circuits.
Proceedings of the Reversible Computation, 4th International Workshop, 2012

2011
Reducing Quantum Cost in Reversible Toffoli Circuits.
CoRR, 2011

2010
Estimating the quality of complexity measures in heuristics for reversible logic synthesis.
Proceedings of the IEEE Congress on Evolutionary Computation, 2010

2006
On Universality of General Reversible Multiple-Valued Logic Gates.
J. Multiple Valued Log. Soft Comput., 2006

2005
Terary GFSOP Minimization Using Kronecker Decision Diagrams and Their Synthesis with Quantum Cascades.
J. Multiple Valued Log. Soft Comput., 2005

2004
A new heuristic algorithm for reversible logic synthesis.
Proceedings of the 41th Design Automation Conference, 2004

2003
Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades.
Proceedings of the 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), 2003

2002
Reversible Logic Synthesis by Iterative Compositions.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Nonlinear Sifting of Decision Diagrams.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

An Approach to Designing Complex Reversible Logic Gates.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Synthesis of Multipurpose Reversible Logic Gates.
Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

2001
Fundamentals of Reversible Logic and Computing.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

Regular Realization of Symmetric Functions Using Reversible Logic.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

An Approach to Minimization of Decision Diagrams .
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

1974
On Boolean Functions Having Maximal Number of Subfunction Classes
Proceedings of the 15th Annual Symposium on Switching and Automata Theory, 1974


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