Peiyong Zhang

Orcid: 0000-0002-7627-2470

According to our database1, Peiyong Zhang authored at least 7 papers between 2009 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
High-performance montgomery modular multiplier with NTT and negative wrapped convolution.
Microelectron. J., February, 2024

2023
An Efficient Self-Healing Architecture for Improving the RAS Characteristics of RISC-V Server and Its Quantitative Evaluation Method.
IEEE Embed. Syst. Lett., March, 2023

2022
A system-on-chip for series arc fault acquisition in smart grid based on two configurable sampling rate SAR ADCs.
IEICE Electron. Express, 2022

A 0.001-mm<sup>2</sup> 112.32-$\upmu $W All-Digital PLL with Dual-Tuned DCO and Dual-Tuned Control Algorithm.
Circuits Syst. Signal Process., 2022

2020
Speeding Up Deep Convolutional Neural Networks Based on Tucker-CP Decomposition.
Proceedings of the ICMLT 2020: 5th International Conference on Machine Learning Technologies, 2020

2017
OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2009
A Quantitative Method for Pulse Strength Classification Based on Decision Tree.
J. Softw., 2009


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