Peter Hallschmid

According to our database1, Peter Hallschmid authored at least 9 papers between 2001 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2016
Local congestion and blockage aware routability analysis using adaptive flexible modeling.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
Hierarchical Dynamic Power-Gating in FPGAs.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

2014
High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2011
Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2008
Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007
Automatic Cache Tuning for Energy-Efficiency using Local Regression Modeling.
Proceedings of the 44th Design Automation Conference, 2007

2006
Fast Configuration of an Energy-Efficient Branch Predictor.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

2005
Routing architecture optimizations for high-density embedded programmable IP cores.
IEEE Trans. Very Large Scale Integr. Syst., 2005

2001
Detailed routing architectures for embedded programmable logic IP cores.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001


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