Res Saleh

According to our database, Res Saleh authored at least 82 papers between 1988 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2022

Statistical Properties of the log-cosh Loss Function Used in Machine Learning.

Resve A. Saleh, A. K. Md. Ehsanes Saleh

CoRR, 2022

Rapid Design-Space Exploration for Low-Power Manycores Under Process Variation Utilizing Machine Learning.

Sohaib Majzoub, Resve A. Saleh, Mottaqiallah Taouil, Said Hamdioui, Mohamed Bamakhrama

IEEE Access, 2022

2021

Solution to the Non-Monotonicity and Crossing Problems in Quantile Regression.

Resve A. Saleh, A. K. Md. Ehsanes Saleh

CoRR, 2021

2019

Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era.

Sohaib Majzoub, Resve A. Saleh, Imran Ashraf, Mottaqiallah Taouil, Said Hamdioui

IEEE Access, 2019

2011

Autonomous, Multilevel Ring Tuning Scheme for Post-Silicon Active Clock Deskewing Over Intra-Die Variations.

Jeffrey G. Mueller, Resve A. Saleh

IEEE Trans. Very Large Scale Integr. Syst., 2011

A 10 Gb/s low-power serdes receiver based on a hybrid speculative/SAR digitization technique.

Arash Zargaran-Yazd, Shahriar Mirabbasi, Res Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

RTL delay macro-modeling with Vt and Vdd variability.

Tatsuya Koyagi, Sohaib Majzoub, Masahiro Fukui, Resve A. Saleh

Proceedings of the 6th IEEE International Design and Test Workshop, 2011

Sequence pair based voltage island floorplanning.

Dipanjan Sengupta, Andreas G. Veneris, Steven J. E. Wilton, André Ivanov, Res Saleh

Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

2010

Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm.

Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab K. Ward

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

2009

Application-Driven Voltage-Island Partitioning for Low-Power System-on-Chip Design.

Dipanjan Sengupta, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

An Improved Active Decoupling Capacitor for "Hot-Spot" Supply Noise Reduction in ASIC Designs.

Xiongfei Meng, Resve A. Saleh

IEEE J. Solid State Circuits, 2009

Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT.

Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab Kreidieh Ward

Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms.

Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab Ward

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Active decap design considerations for optimal supply noise reduction.

Xiongfei Meng, Resve A. Saleh

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

PVT variation impact on voltage island formation in MPSoC design.

Sohaib Majzoub, Resve A. Saleh, Rabab K. Ward

Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Charge-borrowing decap: A novel circuit for removal of local supply noise violations.

Xiongfei Meng, Resve A. Saleh, Steven J. E. Wilton

Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008

Layout of Decoupling Capacitors in IP Blocks for 90-nm CMOS.

Xiongfei Meng, Resve A. Saleh, Karim Arabi

IEEE Trans. Very Large Scale Integr. Syst., 2008

Adaptive Compensation of RF Front-End Nonidealities in Direct Conversion Receivers.

Zahra Sadat Ebadi, Resve A. Saleh

IEEE Trans. Circuits Syst. II Express Briefs, 2008

Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs.

Peter Hallschmid, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Single Edge Clock (SEC) Distribution for Improved Latency, Skew, and Jitter Performance.

Jeff Mueller, Resve A. Saleh

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Supply voltage selection in Voltage Island based SoC design.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

A Tunable Clock Buffer for Intra-die PVT Compensation in Single-Edge Clock (SEC) Distribution Networks.

Jeff Mueller, Resve A. Saleh

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

A Fully-Integrated 2.4 GHz Mismatch-Controllable RF Front-end Test Platform in 0.18µm CMOS.

Zahra Sadat Ebadi, Resve A. Saleh

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Partitioning for Selective Flip-Flop Redundancy in Sequential Circuits.

Uthman Alsaiari, Resve A. Saleh

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Delay macromodeling and estimation for RTL.

Tatsuya Koyagi, Masahiro Fukui, Resve A. Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Application-driven floorplan-aware voltage island design.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 45th Design Automation Conference, 2008

2007

Generalized Power-Delay Metrics in Deep Submicron CMOS Designs.

Dipanjan Sengupta, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Testing Network-on-Chip Communication Fabrics.

Cristian Grecu, André Ivanov, Resve A. Saleh, Partha Pratim Pande

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Design and implementation of reconfigurable and flexible test access mechanism for system-on-chip.

Zahra Sadat Ebadi, Alireza Nasiri Avanaki, Resve A. Saleh, André Ivanov

Integr., 2007

Power Supply Noise in SoCs: Metrics, Management, and Measurement.

Karim Arabi, Resve A. Saleh, Xiongfei Meng

IEEE Des. Test Comput., 2007

DFM-EDA's Salvation or its Excuse for Being out of Touch with Engineering?

Resve A. Saleh, Pallab K. Chatterjee, Ivan Pesic, Robbert Dobkins, Mike Smayling, Joseph Sawicki

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Power, Delay and Yield Analysis of BIST/BISR PLAs Using Column Redundancy.

Uthman Alsaiari, Resve A. Saleh

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

A Novel Active Decoupling Capacitor Design in 90nm CMOS.

Xiongfei Meng, Karim Arabi, Resve A. Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Power Reduction of On-Chip Serial Links.

Amit Kedia, Resve A. Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Essential Fault-Tolerance Metrics for NoC Infrastructures.

Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Resve A. Saleh

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Automatic Cache Tuning for Energy-Efficiency using Local Regression Modeling.

Peter Hallschmid, Resve A. Saleh

Proceedings of the 44th Design Automation Conference, 2007

2006

The application of complex quantized feedback in integrated wireless receivers.

Zahra Sadat Ebadi, Shahriar Mirabbasi, Resve A. Saleh

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

System-on-Chip: Reuse and Integration.

Resve A. Saleh, Steven J. E. Wilton, Shahriar Mirabbasi, Alan J. Hu, Mark R. Greenstreet, Guy Lemieux, Partha Pratim Pande, Cristian Grecu, André Ivanov

Proc. IEEE, 2006

BIST for Network-on-Chip Interconnect Infrastructures.

Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

A "Soft++" eFPGA Physical Design Approach with Case Studies in 180nm and 90nm.

Victor O. Aken'Ova, Resve A. Saleh

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Fast Configuration of an Energy-Efficient Branch Predictor.

Peter Hallschmid, Resve A. Saleh

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Novel Decoupling Capacitor Designs for sub- 90nm CMOS Technology.

Xiongfei Meng, Resve A. Saleh, Karim Arabi

Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006

A high-speed low-energy dynamic PLA using an input-isolation scheme.

Reza Molavi, Shahriar Mirabbasi, Resve A. Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Testable and self-repairable structured logic design.

Uthman Alsaiari, Resve A. Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

On-line Fault Detection and Location for NoC Interconnects.

Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

NoC Interconnect Yield Improvement Using Crosspoint Redundancy.

Cristian Grecu, André Ivanov, Res Saleh, Partha Pratim Pande

Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2005

Performance Evaluation and Design Trade-Offs for Network-on-Chip Interconnect Architectures.

Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Resve A. Saleh

IEEE Trans. Computers, 2005

Timing analysis of network on chip architectures for MP-SoC platforms.

Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh

Microelectron. J., 2005

An approach that will NoC your SoCs off!

Resve A. Saleh

IEEE Des. Test Comput., 2005

Design, Synthesis, and Test of Networks on Chips.

Partha Pratim Pande, Cristian Grecu, André Ivanov, Resve A. Saleh, Giovanni De Micheli

IEEE Des. Test Comput., 2005

Power-Delay Metrics Revisited for 90nm CMOS Technology.

Dipanjan Sengupta, Resve A. Saleh

Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Effect of traffic localization on energy dissipation in NoC-based interconnect.

Partha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Methodologies and Algorithms for Testing Switch-Based NoC Interconnects.

Cristian Grecu, Partha Pratim Pande, Baosheng Wang, André Ivanov, Res Saleh

Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

An improved "soft" eFPGA design and implementation strategy.

Victor O. Aken'Ova, Guy Lemieux, Resve A. Saleh

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

A Scalable Communication-Centric SoC Interconnect Architecture.

Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh

Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs.

Cristian Grecu, Partha Pratim Pande, André Ivanov, Res Saleh

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

A technique for DC-offset removal and carrier phase error compensation in integrated wireless receivers.

Stephan Shang, Shahriar Mirabbasi, Resve A. Saleh

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Design of a switch for network on chip applications.

Partha Pratim Pande, Cristian Grecu, André Ivanov, Res Saleh

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Analog IP design flow for SoC applications.

Mama Hamour, Resve A. Saleh, Shahriar Mirabbasi, André Ivanov

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

SoC implementation issues for synthesizable embedded programmable logic cores.

James C. H. Wu, Victor O. Aken'Ova, Steven J. E. Wilton, Resve A. Saleh

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2002

Dedicated Autonomous Scan-Based Testing (DAST) for Embedded Cores.

Mohsen Nahvi, André Ivanov, Resve A. Saleh

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Trends in Low Power Digital System-on-Chip Designs (invited).

Resve A. Saleh, G. Lim, T. Kadowaki, K. Uchiyama

Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

2000

Clock skew verification in the presence of IR-drop in the powerdistribution network.

Resve A. Saleh, Syed Zakir Hussain, Steffen Rochel, David Overhauser

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

1998

Full-chip verification of UDSM designs.

Resve A. Saleh, David Overhauser, Sandy Taylor

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1996

Multilevel and mixed-domain simulation of analog circuits and systems.

Resve A. Saleh, Brian A. A. Antao, Jaidip Singh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

A multifrequency technique for frequency response computation with application to switched-capacitor circuits with nonlinearities.

Jeffrey G. Mueller, Brian A. A. Antao, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

1995

Improving Parallel Circuit Simulation Using High-Level Waveforms.

Yen-Cheng Wen, Kyle A. Gallivan, Resve A. Saleh

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

Mixed-mode simulation and analog multilevel simulation.

Resve A. Saleh, Shyh-Jye Jou, A. Richard Newton

The Kluwer international series in engineering and computer science, Kluwer, ISBN: 978-0-7923-9473-0, 1994

1993

Improving the performance of parallel relaxation-based circuit simulators.

Gih-Guang Hung, Yen-Cheng Wen, Kyle A. Gallivan, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1992

Parallel waveform-Newton algorithms for circuit simulation.

Eugene Z. Xia, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

Exact Evaluation of Diagnostic Test Resolution.

Ken Kubiak, Steven Parkes, W. Kent Fuchs, Resve A. Saleh

Proceedings of the 29th Design Automation Conference, 1992

Incremental Circuit Simulation Using Waveform Relaxation.

Yun-Cheng Ju, Resve A. Saleh

Proceedings of the 29th Design Automation Conference, 1992

1991

Consistency checking and optimization of macromodels.

Yun-Cheng Ju, Vasant B. Rao, Resve A. Saleh

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

Parallel Event-Driven Waveform Relaxation.

Yen-Cheng Wen, Kyle A. Gallivan, Resve A. Saleh

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

Identification of Viable Paths Using Binary Decision Diagrams.

Yun-Cheng Ju, Resve A. Saleh

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

iMACSIM: A Program for Multi-Level Analog Circuit Simulation.

Jaidip Singh, Resve A. Saleh

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Incremental Techniques for the Identification of Statically Sensitizable Critical Paths.

Yun-Cheng Ju, Resve A. Saleh

Proceedings of the 28th Design Automation Conference, 1991

1990

Accelerating relaxation algorithms for circuit simulation using waveform-Newton and step-size refinement.

Resve A. Saleh, Jacob K. White

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990

Mixed-Mode Incremental Simulation and Concurrent Fault Simulation.

Yun-Cheng Ju, Fred L. Yang, Resve A. Saleh

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Parallel Circuit Simulation Using Hierarchical Relaxation.

Gih-Guang Hung, Yen-Cheng Wen, Kyle A. Gallivan, Resve A. Saleh

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989

The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation.

Resve A. Saleh, A. Richard Newton

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

1988

Compaction of ATPG-generated test sequences for sequential circuits.

Rabindra K. Roy, Thomas M. Niermann, Janak H. Patel, Jacob A. Abraham, Resve A. Saleh

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988