Pietro Fezzardi

Orcid: 0000-0003-0914-3844

According to our database1, Pietro Fezzardi authored at least 12 papers between 2015 and 2022.

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Bibliography

2022
Svelto: High-Level Synthesis of Multi-Threaded Accelerators for Graph Analytics.
IEEE Trans. Computers, 2022

2021
Invited: Bambu: an Open-Source Research Framework for the High-Level Synthesis of Complex Applications.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Automated Bug Detection for High-level Synthesis of Multi-threaded Irregular Applications.
ACM Trans. Parallel Comput., 2020

A Comb for Decompiled C Code.
Proceedings of the ASIA CCS '20: The 15th ACM Asia Conference on Computer and Communications Security, 2020

2019
Toward a V2I-based Solution for Traffic Lights Optimization.
Proceedings of the 11th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2019

Software defined architectures for data analytics.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
Discrepancy analysis: a methodology for automated bug detection in hardware designs generated with high-Level synthesis.
PhD thesis, 2018

Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis.
IEEE Des. Test, 2018

rev.ng: A Multi-Architecture Framework for Reverse Engineering and Vulnerability Discovery.
Proceedings of the 2018 International Carnahan Conference on Security Technology, 2018

2017
Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis.
ACM Trans. Embed. Comput. Syst., 2017

2016
Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Trace-based automated logical debugging for high-level synthesis generated circuits.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015


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