Giovanni Agosta

Affiliations:
  • Polytechnic University of Milan, Italy


According to our database1, Giovanni Agosta authored at least 115 papers between 2003 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Tunable approximations to control time-to-solution in an HPC molecular docking Mini-App.
J. Supercomput., 2021

FixM: Code generation of fixed point mathematical functions.
Sustain. Comput. Informatics Syst., 2021

The RECIPE Approach to Challenges in Deeply Heterogeneous High Performance Systems.
CoRR, 2021

The Impact of Precision Tuning on Embedded Systems Performance: A Case Study on Field-Oriented Control.
Proceedings of the 12th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and 10th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2021


Architecture-aware Precision Tuning with Multiple Number Representation Systems.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021


2020
Compiler-Based Techniques to Secure Cryptographic Embedded Software Against Side-Channel Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Dynamic Precision Autotuning with TAFFO.
ACM Trans. Archit. Code Optim., 2020

The RECIPE approach to challenges in deeply heterogeneous high performance systems.
Microprocess. Microsystems, 2020

TAFFO: Tuning Assistant for Floating to Fixed Point Optimization.
IEEE Embed. Syst. Lett., 2020

Tools for Reduced Precision Computation: A Survey.
ACM Comput. Surv., 2020

Automated Precision Tuning in Activity Classification Systems: A Case Study.
Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2020

A Comb for Decompiled C Code.
Proceedings of the ASIA CCS '20: The 15th ACM Asia Conference on Computer and Communications Security, 2020

2019
The ANTAREX domain specific language for high performance computing.
Microprocess. Microsystems, 2019

The ANTAREX Domain Specific Language for High Performance Computing.
CoRR, 2019

Survey of Memory Management Techniques for HPC and Cloud Computing.
IEEE Access, 2019

Predictive Resource Management for Next-Generation High-Performance Computing Heterogeneous Platforms.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019

Accelerating Automotive Analytics: The M2DC Appliance Approach.
Proceedings of the Embedded Computer Systems: Architectures, Modeling, and Simulation, 2019


Prediction-Based Partitions Evaluation Algorithm for Resource Allocation.
Proceedings of the Parallel Computing: Technology Trends, 2019

Feedback-Driven Performance and Precision Tuning for Automatic Fixed Point Exploitation.
Proceedings of the Parallel Computing: Technology Trends, 2019

Towards a High-Performance Modelica Compiler.
Proceedings of the 13th International Modelica Conference, Regensburg, Germany, 2019

Toward a V2I-based Solution for Traffic Lights Optimization.
Proceedings of the 11th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2019

Towards a benchmark suite for high-performance Modelica compilers.
Proceedings of the EOOLT '19: 9th International Workshop on Equation-Based Object-Oriented Modeling Languages and Tools, 2019

Challenges in Deeply Heterogeneous High Performance Systems.
Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

Fixed point exploitation via compiler analyses and transformations: POSTER.
Proceedings of the 16th ACM International Conference on Computing Frontiers, 2019

2018
libVersioningCompiler: An easy-to-use library for dynamic generation and invocation of multiple code versions.
SoftwareX, 2018

Wireless Communication Technologies for Safe Cooperative Cyber Physical Systems.
Sensors, 2018

Exploring manycore architectures for next-generation HPC systems through the MANGO approach.
Microprocess. Microsystems, 2018

Reactive side-channel countermeasures: Applicability and quantitative security evaluation.
Microprocess. Microsystems, 2018

Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems.
Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, 2018

rev.ng: A Multi-Architecture Framework for Reverse Engineering and Vulnerability Discovery.
Proceedings of the 2018 International Carnahan Conference on Security Technology, 2018

Aspect-Driven Mixed-Precision Tuning Targeting GPUs.
Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

Managing Heterogeneous Resources in HPC Systems.
Proceedings of the 9th Workshop on Parallel Programming and RunTime Management Techniques for Manycore Architectures and 7th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, 2018

ANTAREX: A DSL-Based Approach to Adaptively Optimizing and Enforcing Extra-Functional Properties in High Performance Computing.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Embedded Operating System Optimization through Floating to Fixed Point Compiler Transformation.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018


2017
M2DC - Modular Microserver DataCentre with heterogeneous hardware.
Microprocess. Microsystems, 2017

The ANTAREX tool flow for monitoring and autotuning energy efficient HPC systems.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

Implications of Reduced-Precision Computations in HPC: Performance, Energy and Error.
Proceedings of the Parallel Computing is Everywhere, 2017

Optimizing Memory Management in Deeply Heterogeneous HPC Accelerators.
Proceedings of the 46th International Conference on Parallel Processing Workshops, 2017


rev.ng: a unified binary analysis framework to recover CFGs and function boundaries.
Proceedings of the 26th International Conference on Compiler Construction, 2017

2016

Safe cooperative CPS: A V2I traffic management scenario in the SafeCOP project.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Encasing block ciphers to foil key recovery attempts via side channel.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Stack size estimation on machine-independent intermediate code for OpenCL kernels.
Proceedings of the 7th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and the 5th Workshop on Design Tools and Architectures For Multicore Embedded Computing Platforms, 2016


V2I Cooperation for Traffic Management with SafeCop.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Autotuning and adaptivity approach for energy efficient Exascale HPC systems: The ANTAREX approach.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Enabling HPC for QoS-sensitive applications: The MANGO approach.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

The ANTAREX approach to autotuning and adaptivity for energy efficient HPC systems.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

Automated instantiation of side-channel attacks countermeasures for software cipher implementations.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

A jump-target identification method for multi-architecture static binary translation.
Proceedings of the 2016 International Conference on Compilers, 2016

2015
The MEET Approach: Securing Cryptographic Embedded Software Against Side Channel Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Trace-based schedulability analysis to enhance passive side-channel attack resilience of embedded software.
Inf. Process. Lett., 2015

OpenCL performance portability for general-purpose computation on graphics processor units: an exploration on cryptographic primitives.
Concurr. Comput. Pract. Exp., 2015

Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

Cyber-security analysis and evaluation for smart home management solutions.
Proceedings of the International Carnahan Conference on Security Technology, 2015

Playful Supervised Smart Spaces (P3S) - A Framework for Designing, Implementing and Deploying Multisensory Play Experiences for Children with Special Needs.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

Information leakage chaff: feeding red herrings to side channel attackers.
Proceedings of the 52nd Annual Design Automation Conference, 2015

ANTAREX - AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015

The MANGO FET-HPC Project: An Overview.
Proceedings of the 18th IEEE International Conference on Computational Science and Engineering, 2015

2014
Design space extension for secure implementation of block ciphers.
IET Comput. Digit. Tech., 2014

Differential Fault Analysis for Block Ciphers: an Automated Conservative Analysis.
Proceedings of the 7th International Conference on Security of Information and Networks, 2014

Security Integration in Medical Device Design: Extension of an Automated Bio-Medical Engineering Design Methodology.
Proceedings of the 11th International Conference on Information Technology: New Generations, 2014

OpenCL Application Auto-tuning and Run-Time Resource Management for Multi-core Platforms.
Proceedings of the IEEE International Symposium on Parallel and Distributed Processing with Applications, 2014

Securing software cryptographic primitives for embedded systems against side channel attacks.
Proceedings of the International Carnahan Conference on Security Technology, 2014

Towards Transparently Tackling Functionality and Performance Issues across Different OpenCL Platforms.
Proceedings of the Second International Symposium on Computing and Networking, 2014

A Multiple Equivalent Execution Trace Approach to Secure Cryptographic Embedded Software.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

Data Parallel Application Adaptivity and System-Wide Resource Management in Many-Core Architectures.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
Enhancing Passive Side-Channel Attack Resilience through Schedulability Analysis of Data-Dependency Graphs.
Proceedings of the Network and System Security - 7th International Conference, 2013

On Task Assignment in Data Intensive Scalable Computing.
Proceedings of the Job Scheduling Strategies for Parallel Processing, 2013

Compiler-based side channel vulnerability analysis and optimized countermeasures application.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Architecture Optimization of Application-Specific Implicit Instructions.
ACM Trans. Embed. Comput. Syst., 2012

Automatic memoization for energy efficiency in financial applications.
Sustain. Comput. Informatics Syst., 2012

Automated Security Analysis of Dynamic Web Applications through Symbolic Code Execution.
Proceedings of the Ninth International Conference on Information Technology: New Generations, 2012

A code morphing methodology to automate power analysis countermeasures.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KeeLoq Exhaustive Search Attacks.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2011
Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

An Optimized Reduction Design to Minimize Atomic Operations in Shared Memory Multiprocessors.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

Dynamic memoization for energy efficiency in financial applications.
Proceedings of the 2011 International Green Computing Conference and Workshops, 2011

Exploiting Thread-Data Affinity in OpenMP with Data Access Patterns.
Proceedings of the Euro-Par 2011 Parallel Processing - 17th International Conference, 2011

2010
A highly flexible, parallel virtual machine: design and experience of ILDJIT.
Softw. Pract. Exp., 2010

Record Setting Software Implementation of DES Using CUDA.
Proceedings of the Seventh International Conference on Information Technology: New Generations, 2010



Parallelism and Retargetability in the ILDJIT Dynamic Compiler.
Proceedings of the ARCS '10, 2010

Improved Programming of GPU Architectures through Automated Data Allocation and Loop Restructuring.
Proceedings of the ARCS '10, 2010

2009
A Transform-Parametric Approach to Boolean Matching.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Fast Disk Encryption through GPGPU Acceleration.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

Design of a parallel AES for graphics hardware using the CUDA framework.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009

Just-In-Time compilation on ARM processors.
Proceedings of the 4th workshop on the Implementation, 2009

Dynamic Look Ahead Compilation: A Technique to Hide JIT Compilation Latencies in Multicore Environment.
Proceedings of the Compiler Construction, 18th International Conference, 2009

2008
Static Analysis of Transaction-Level Communication Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

A parallel dynamic compiler for CIL bytecode.
ACM SIGPLAN Notices, 2008

Dynamic configuration of application-specific implicit instructions for embedded pipelined processors.
Proceedings of the 2008 ACM Symposium on Applied Computing (SAC), 2008

2007
Programming Highly Parallel Reconfigurable Architectures for Symmetric and Asymmetric Cryptographic Applications.
J. Comput., 2007

Efficient architecture/compiler co-exploration using analytical models.
Des. Autom. Embed. Syst., 2007

Programming Highly Parallel Reconfigurable Architectures for Public-Key Cryptographic Applications.
Proceedings of the Fourth International Conference on Information Technology: New Generations (ITNG 2007), 2007

An efficient cost-based canonical form for Boolean matching.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

Countermeasures against Branch Target Buffer Attacks.
Proceedings of the Fourth International Workshop on Fault Diagnosis and Tolerance in Cryptography, 2007

A Domain Specific Language for Cryptography.
Proceedings of the Forum on specification and Design Languages, 2007

A Unified Approach to Canonical Form-based Boolean Matching.
Proceedings of the 44th Design Automation Conference, 2007

2006
Countermeasures for the Simple Branch Prediction Analysis.
IACR Cryptol. ePrint Arch., 2006

Selective compilation via fast code analysis and bytecode tracing.
Proceedings of the 2006 ACM Symposium on Applied Computing (SAC), 2006

Adaptive Metrics for System-Level Functional Partitioning.
Proceedings of the Forum on specification and Design Languages, 2006

Synthesis of Object Oriented Models on Reconfigurable Hardware.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

2005
JIST: Just-In-Time scheduling translation for parallel processors.
Sci. Program., 2005

Aspect Orientation in System Level Design.
Proceedings of the Forum on specification and Design Languages, 2005

A Data Oriented Approach to the Design of Reconfigurable Stream Decoders.
Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005

2004
Multi-objective co-exploration of source code transformations and design space architectures for low-power embedded systems.
Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004

Synthesis of Dynamic Class Loading Specifications on Reconfigurable Hardware.
Proceedings of the 2nd IEEE International Workshop on Electronic Design, 2004

2003
Static analysis of transaction-level models.
Proceedings of the 40th Design Automation Conference, 2003


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