Pinalkumar Engineer

According to our database, Pinalkumar Engineer authored at least 7 papers between 2012 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Parallelizing Non-Neural ML Algorithm for Edge-based Face Recognition on Parallel Ultra-Low Power (PULP) Cluster.

Mitul Sudhirkumar Nagar, Rahul Kumar, Pinalkumar Engineer

Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

Memory-efficient Edge-based Non-Neural Face Recognition Algorithm on the Parallel Ultra-Low Power (PULP) Cluster.

Mitul Sudhirkumar Nagar, Sayantan Maiti, Rahul Kumar, Hiren Mewada, Pinalkumar Engineer

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

A Memory Efficient Run-time Re-configurable Convolution IP Core for Deep Neural Networks Inference on FPGA Devices.

Swati, Ranajoy Sadhukhan, Mitul Sudhirkumar Nagar, Pinalkumar Engineer

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2020

Scalable implementation of particle filter-based visual object tracking on network-on-chip (NoC).

Pinalkumar Engineer, Rajbabu Velmurugan, Sachin B. Patkar

J. Real Time Image Process., 2020

2015

Framework for Application Mapping over Packet-Switched Network of FPGAs: Case Studies.

Vinay B. Y. Kumar, Pinalkumar Engineer, Mandar Datar, Yatish Turakhia, Saurabh Agarwal, Sanket Diwale, Sachin B. Patkar

CoRR, 2015

Parameterizable FPGA Framework for Particle Filter Based Object Tracking in Video.

Pinalkumar Engineer, Rajbabu Velmurugan, Sachin B. Patkar

Proceedings of the 28th International Conference on VLSI Design, 2015

2012

FPGA Implementation of Particle Filter Based Object Tracking in Video.

Sumeet Agrawal, Pinal Engineer, Rajbabu Velmurugan, Sachin B. Patkar

Proceedings of the International Symposium on Electronic System Design, 2012