Pramod Chandraiah

According to our database1, Pramod Chandraiah authored at least 8 papers between 2006 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
Computer-Aided Recoding to Create Structured and Analyzable System Models.
ACM Trans. Embed. Comput. Syst., 2012

2008
Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Automatic re-coding of reference code into structured and analyzable SoC models.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
An Interactive Model Re-Coder for Efficient SoC Specification.
Proceedings of the Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30, 2007

Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification.
Proceedings of the 44th Design Automation Conference, 2007

Pointer re-coding for creating definitive MPSoC models.
Proceedings of the 5th International Conference on Hardware/Software Codesign and System Synthesis, 2007

Creating Explicit Communication in SoC Models Using Interactive Re-Coding.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006
Generic netlist representation for system and PE level design exploration.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006


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