Bita Gorjiara

According to our database, Bita Gorjiara authored at least 16 papers between 2004 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Merged Dictionary Code Compression for FPGA Implementation of Custom Microcoded PEs.

Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski

ACM Trans. Reconfigurable Technol. Syst., 2008

C-based design flow: a case study on G.729A for voice over internet protocol (VoIP).

Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski

Proceedings of the 45th Design Automation Conference, 2008

Automatic architecture refinement techniques for customizing processing elements.

Bita Gorjiara, Daniel Gajski

Proceedings of the 45th Design Automation Conference, 2008

2007

Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling.

Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou

ACM Trans. Design Autom. Electr. Syst., 2007

A novel profile-driven technique for simultaneous power and code-size optimization of microcoded IPs.

Bita Gorjiara, Daniel Gajski

Proceedings of the 25th International Conference on Computer Design, 2007

FPGA-friendly code compression for horizontal microcoded custom IPs.

Bita Gorjiara, Daniel Gajski

Proceedings of the ACM/SIGDA 15th International Symposium on Field Programmable Gate Arrays, 2007

Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost.

Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Generic Processor Modeling for Automatically Generating Very Fast Cycle-Accurate Simulators.

Mehrdad Reshadi, Bita Gorjiara, Nikil D. Dutt

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Aspect-Oriented Architecture Description for Retargetable Compilation, Simulation and Synthesis of Application-Specific Pipelined Datapaths .

Bita Gorjiara, Mehrdad Reshadi, Daniel Gajski

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

A Graph Based Algorithm for Data Path Optimization in Custom Processors.

Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, Daniel Gajski

Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Generic netlist representation for system and PE level design exploration.

Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah, Daniel Gajski

Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

Designing a custom architecture for DCT using NISC technology.

Bita Gorjiara, Mehrdad Reshadi, Daniel D. Gajski

Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

2005

Utilizing Horizontal and Vertical Parallelism with a No-Instruction-Set Compiler for Custom Datapaths.

Mehrdad Reshadi, Bita Gorjiara, Daniel D. Gajski

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

Custom Processor Design Using NISC: A Case-Study on DCT algorithm.

Bita Gorjiara, Daniel D. Gajski

Proceedings of the 2005 3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005

2004

An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes.

Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

Fast and efficient voltage scheduling by evolutionary slack distribution.

Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004