Priya Wali
Orcid: 0000-0002-1996-9319
  According to our database1,
  Priya Wali
  authored at least 6 papers
  between 2021 and 2024.
  
  
Collaborative distances:
Collaborative distances:
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Bibliography
  2024
Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging.
    
  
    Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
    
  
  2022
A Fractional-N Digital LC-PLL Using Coupled Frequency Doubler With Frequency-Tracking Loop for Wireline Applications.
    
  
    IEEE J. Solid State Circuits, 2022
    
  
    IEEE J. Solid State Circuits, 2022
    
  
  2021
    Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
    
  
11.5 A 23.9-to-29.4GHz Digital LC-PLL with a Coupled Frequency Doubler for Wireline Applications in 10nm FinFET.
    
  
    Proceedings of the IEEE International Solid-State Circuits Conference, 2021
    
  
    Proceedings of the IEEE International Solid-State Circuits Conference, 2021