Priyadharshini Shanmugasundaram

According to our database, Priyadharshini Shanmugasundaram authored at least 3 papers between 2011 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

Externally Tested Scan Circuit with Built-In Activity Monitor and Adaptive Test Clock.

Priyadharshini Shanmugasundaram, Vishwani D. Agrawal

Proceedings of the 25th International Conference on VLSI Design, 2012

2011

Dynamic scan clock control for test time reduction maintaining peak power limit.

Priyadharshini Shanmugasundaram, Vishwani D. Agrawal

Proceedings of the 29th IEEE VLSI Test Symposium, 2011

An efficient test data reduction technique through dynamic pattern mixing across multiple fault models.

Srinivasulu Alampally, R. T. Venkatesh, Priyadharshini Shanmugasundaram, Rubin A. Parekhji, Vishwani D. Agrawal

Proceedings of the 29th IEEE VLSI Test Symposium, 2011