Qing Yang

According to our database1, Qing Yang authored at least 91 papers between 1987 and 2018.

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Bibliography

2018
REGISTOR: A Platform for Unstructured Data Processing Inside SSD Storage.
Proceedings of the 11th ACM International Systems and Storage Conference, 2018

2017
Incorporating Intelligence in Fog Computing for Big Data Analysis in Smart Cities.
IEEE Trans. Industrial Informatics, 2017

2015
Hardware accelerator for similarity based data dedupe.
Proceedings of the 10th IEEE International Conference on Networking, 2015

Reflex-Tree: A Biologically Inspired Parallel Architecture for Future Smart Cities.
Proceedings of the 44th International Conference on Parallel Processing, 2015

A Parallel and Pipelined Architecture for Accelerating Fingerprint Computation in High Throughput Data Storages.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

A Reconfigurable Multiclass Support Vector Machine Architecture for Real-Time Embedded Systems Classification.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

A neural machine interface architecture for real-time artificial lower limb control.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

F/M-CIP: Implementing Flash Memory Cache Using Conservative Insertion and Promotion.
Proceedings of the 15th IEEE/ACM International Symposium on Cluster, 2015

2014
${\rm S}^{2}$-RAID: Parallel RAID Architecture for Fast Data Recovery.
IEEE Trans. Parallel Distrib. Syst., 2014

2013
A New Metadata Update Method for Fast Recovery of SSD Cache.
Proceedings of the IEEE Eighth International Conference on Networking, 2013

Real-time implementation of a self-recovery EMG pattern recognition interface for artificial arms.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

Design and implementation of a low power mobile CPU based embedded system for artificial leg control.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
On Design and Implementation of Neural-Machine Interface for Artificial Legs.
IEEE Trans. Industrial Informatics, 2012

Compression Speed Enhancements to LZO for Multi-core Systems.
Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

Enhancing shared RAID performance through online profiling.
Proceedings of the IEEE 28th Symposium on Mass Storage Systems and Technologies, 2012

An automatic and user-driven training method for locomotion mode recognition for artificial leg control.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

Promise of a low power mobile CPU based embedded system in artificial leg control.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

Implementing an FPGA system for real-time intent recognition for prosthetic legs.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
A Novel CPS System for Evaluating a Neural-Machine Interface for Artificial Legs.
Proceedings of the 2011 IEEE/ACM International Conference on Cyber-Physical Systems, 2011

I-CASH: Intelligently Coupled Array of SSD and HDD.
Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

2010
S2-RAID: A new RAID architecture for fast data recovery.
Proceedings of the IEEE 26th Symposium on Mass Storage Systems and Technologies, 2010

A New Buffer Cache Design Exploiting Both Temporal and Content Localities.
Proceedings of the 2010 International Conference on Distributed Computing Systems, 2010

Integrating neuromuscular and cyber systems for neural control of artificial legs.
Proceedings of the ACM/IEEE 1st International Conference on Cyber-Physical Systems, 2010

Design and implementation of a special purpose embedded system for neural machine interface.
Proceedings of the 28th International Conference on Computer Design, 2010

2009
A Case for Continuous Data Protection at Block Level in Disk Array Storages.
IEEE Trans. Parallel Distrib. Syst., 2009

Securing rating aggregation systems using statistical detectors and trust.
IEEE Trans. Information Forensics and Security, 2009

Design and Analysis of Block-Level Snapshots for Data Protection and Recovery.
IEEE Trans. Computers, 2009

Defending online reputation systems against collaborative unfair raters through signal modeling and trust.
Proceedings of the 2009 ACM Symposium on Applied Computing (SAC), 2009

2008
Optimal Implementation of Continuous Data Protection (CDP) in Linux Kernel.
Proceedings of The 2008 IEEE International Conference on Networking, 2008

Can We Really Recover Data if Storage Subsystem Fails?
Proceedings of the 28th IEEE International Conference on Distributed Computing Systems (ICDCS 2008), 2008

2007
Building Trust in Online Rating Systems Through Signal Modeling.
Proceedings of the 27th International Conference on Distributed Computing Systems Workshops (ICDCS 2007 Workshops), 2007

2006
TEA: Transmission Error Approximation for Distance Estimation between Two Zigbee Devices.
Proceedings of the 2006 International Workshop on Networking, 2006

TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time.
Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

PRINS: Optimizing Performance of Reliable Internet Storages.
Proceedings of the 26th IEEE International Conference on Distributed Computing Systems (ICDCS 2006), 2006

On Performance of Parallel iSCSI Protocol for Networked Storage Systems.
Proceedings of the 20th International Conference on Advanced Information Networking and Applications (AINA 2006), 2006

2005
SPEK: A Storage Performance Evaluation Kernel Module for Block-Level Storage Systems under Faulty Conditions.
IEEE Trans. Dependable Sec. Comput., 2005

2004
STICS: SCSI-to-IP cache for storage area networks.
J. Parallel Distrib. Comput., 2004

Cost-Effective Remote Mirroring Using the iSCSI Protocol.
Proceedings of the 21st IEEE Conference on Mass Storage Systems and Technologies / 12th NASA Goddard Conference on Mass Storage Systems and Technologies, 2004

BUCS - A Bottom-Up Cache Structure for Networked Storage Servers.
Proceedings of the 33rd International Conference on Parallel Processing (ICPP 2004), 2004

A New Hierarchy Cache Scheme Using RAM and Pagefile.
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003
RORIB: An Economic and Efficient Solution for Real-Time Online Remote Info Backup.
J. Database Manag., 2003

SPEK: A Storage Performance Evaluation Kernel Module for Block Level Storage Systems.
Proceedings of the 11th International Workshop on Modeling, 2003

A unified, low-overhead framework to support continuous profiling and optimization.
Proceedings of the 22nd IEEE International Performance Computing and Communications Conference, 2003

Performability Evaluation of Networked Storage Systems Using N-SPEK.
Proceedings of the 3rd IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2003), 2003

2002
RAPID-Cache-A Reliable and Inexpensive Write Cache for High Performance Storage Systems.
IEEE Trans. Parallel Distrib. Syst., 2002

Implementation and Performance Evaluation of RAPID-Chache under Linux.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Caching Strategy to Improve iSCSI Performance.
Proceedings of the 27th Annual IEEE Conference on Local Computer Networks (LCN 2002), 2002

Introducing SCSI-to-IP Cache for Storage Area Networks.
Proceedings of the 31st International Conference on Parallel Processing (ICPP 2002), 2002

2000
Performance Evaluation of Distributed Web Server Architectures under E-Commerce Workloads.
Proceedings of the International Conference on Internet Computing, 2000

1999
A Comparative Analysis of Cache Designs for Vector Processing.
IEEE Trans. Computers, 1999

The Design and Implementation of a DCD Device Driver for Unix.
Proceedings of the 1999 USENIX Annual Technical Conference, 1999

Measurement, analysis and performance improvement of the Apache Web server.
Proceedings of the IEEE International Performance Computing and Communications Conference, 1999

RAPID-Cache - A Reliable and Inexpensive Write Cache for Disk I/O Systems.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
A new hierarchical disk architecture.
IEEE Micro, 1998

Performance of One's Complement Caches.
J. Parallel Distrib. Comput., 1998

1997
Minimizing Area Cost of On-Chip Cache Memories by Caching Address Tags.
IEEE Trans. Computers, 1997

1996
A Compiler-Directed Approach to Network Latency Reduction for Distributed Shared Memory Multiprocessors.
J. Parallel Distrib. Comput., 1996

Guest editors' introduction.
J. Comput. Sci. Technol., 1996

A comparative analysis of different arbitration protocols for multiple-bus multiprocessors.
J. Comput. Sci. Technol., 1996

DCD - Disk Caching Disk: A New Approach for Boosting I/O Performance.
Proceedings of the 23rd Annual International Symposium on Computer Architecture, 1996

1995
A Memory Interference Model for Regularly Patterned Multiple Stream Vector Accesses.
IEEE Trans. Parallel Distrib. Syst., 1995

Optimizing INTBIS on the CRAY Y-MP.
Reliable Computing, 1995

A general iterative sparse linear solver and its parallelization for interval Newton methods.
Reliable Computing, 1995

CAT - Caching Address Tags: A Technique for Reducing Area Cost of On-Chip Caches.
Proceedings of the 22nd Annual International Symposium on Computer Architecture, 1995

1994
Parallel All-Row Preconditioned Interval Linear Solver for Nonlinear Equations on Multiprocessors.
Parallel Computing, 1994

An Analytical Model for Load Balancing on Symmetric Multiprocessor Systems.
J. Parallel Distrib. Comput., 1994

Performance of SPEC92 on prime-mapped vector cache.
Proceedings of the Sixth IEEE Symposium on Parallel and Distributed Processing, 1994

A Closed-Form Formula for Queueing Delays in Disk Arrays.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

A One's Complement Cache Memory.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

1993
A New Graph Approach to Minimizing Processor Fragmentation in Hypercube Multiprocessors.
IEEE Trans. Parallel Distrib. Syst., 1993

Introducing a New Cache Design into Vector Computers.
IEEE Trans. Computers, 1993

Performance of Cache Memories for Vector Computers.
J. Parallel Distrib. Comput., 1993

1992
Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors.
IEEE Trans. Parallel Distrib. Syst., 1992

Performance study of two protocols for voice/data integration on ring networks.
Computer Networks and ISBN Systems, 1992

A Novel Cache Design for Vector Processing.
Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, 1992

On Fault-Tolerant Computation of Orthogonal Transforms on Hypercube Computers.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

1991
Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems.
IEEE Trans. Computers, 1991

A Parallelized Algorithm for the All-Row Preconditioned Interval Newton/Generalized Bisection Method.
Proceedings of the Fifth SIAM Conference on Parallel Processing for Scientific Computing, 1991

Effects of Arbitration Protocols on the Performance of Multiple-Bus Multiprocessors.
Proceedings of the International Conference on Parallel Processing, 1991

Prime Cube Graph Approach for Processor Allocation in Hypercube Multiprocessors.
Proceedings of the International Conference on Parallel Processing, 1991

Load balancing on generalized hypercube and mesh multiprocessors with LAL.
Proceedings of the 10th International Conference on Distributed Computing Systems (ICDCS 1991), 1991

1990
Performance of Multiple-Bus Interconnections for Multiprocessors.
J. Parallel Distrib. Comput., 1990

An adaptive cache coherence scheme for hierarchical shared-memory multiprocessors.
Proceedings of the Second IEEE Symposium on Parallel and Distributed Processing, 1990

Design and Analysis of Multiple-Bus Arbiters with Different Priority Schemes.
Proceedings of the Parallel Architectures (Postconference PARBASE-90)., 1990

Performance Analysis of a Cache-Coherent Multiprocessor Based on Hierarchical Multiple Buses.
Proceedings of the Parallel Architectures (Postconference PARBASE-90)., 1990

1989
Analysis and Comparison of Cache Coherence Protocols for a Packet-Switched Multiprocessor.
IEEE Trans. Computers, 1989

Approximate Analysis of Single and Multiple Ring Networks.
IEEE Trans. Computers, 1989

Performance of Multiprocessor Interconnection Networks.
IEEE Computer, 1989

1988
A Queueing Network Model for a Cache Coherence Protocol on Multiple-bus Multiprocessors.
Proceedings of the International Conference on Parallel Processing, 1988

1987
Performance Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems.
Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS '87), 1987

Design and Analysis of a Decentralized Multiple-Bus Multiprocessor.
Proceedings of the International Conference on Parallel Processing, 1987


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