Qizhe Wu

According to our database, Qizhe Wu authored at least 8 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Efficient Message Passing Architecture for GCN Training on HBM-based FPGAs with Orthogonal Topology On-Chip Networks.

Qizhe Wu, Letian Zhao, Yuchen Gui, Huawen Liang, Xiaotian Wang, Xi Jin

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

2023

FTW-GAT: An FPGA-Based Accelerator for Graph Attention Networks With Ternary Weights.

Zerong He, Teng Tian, Qizhe Wu, Xi Jin

IEEE Trans. Circuits Syst. II Express Briefs, November, 2023

Scheduling Memory Access Optimization for HBM Based on CLOS.

Shuang Xue, Huawei Liang, Qizhe Wu, Xi Jin

Proceedings of the 25th International Conference on Advanced Communication Technology, 2023

2022

QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism.

Wei Yuan, Teng Tian, Qizhe Wu, Xi Jin

J. Syst. Archit., 2022

FP-GNN: Adaptive FPGA accelerator for Graph Neural Networks.

Teng Tian, Letian Zhao, Xiaotian Wang, Qizhe Wu, Wei Yuan, Xi Jin

Future Gener. Comput. Syst., 2022

HuGraph: Acceleration of GCN Training on Heterogeneous FPGA Clusters with Quantization.

Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Wei Wu, Xi Jin

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

An SSD-Based Accelerator for Singular Value Decomposition Recommendation Algorithm on Edge.

Wei Wu, Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Xi Jin

Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

2021

Software-Hardware Co-Optimization on Partial-Sum Problem for PIM-based Neural Network Accelerator.

Qizhe Wu, Linfeng Tao, Huawen Liang, Wei Yuan, Teng Tian, Shuang Xue, Xi Jin

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021