Wei Yuan

According to our database, Wei Yuan authored at least 14 papers between 2021 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

Efficient Top-k Sorter through Runtime Lane Selection of Priority Queues on a Directed Ring.

Huawen Liang, Wei Yuan, Qizhe Wu, Xi Jin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

FANNS: An FPGA-Based Approximate Nearest-Neighbor Search Accelerator.

Wei Yuan, Xi Jin

IEEE Trans. Very Large Scale Integr. Syst., April, 2025

GHVSA: Graph-based high-dimensional vector search accelerator.

Wei Yuan, Huawen Liang, Xi Jin

J. Syst. Archit., 2025

MHE-TPE: Multi-Operand High-Radix Encoder for Mixed-Precision Fixed-Point Tensor Processing Engines.

Qizhe Wu, Jinyi Zhou, Zhanhe Hu, Zhichen Zeng, Huawen Liang, Jiuru Zhu, Linfeng Tao, Xin Zhang, Zekang Cheng, Letian Zhao, Wei Yuan, Xiaotian Wang, Xi Jin

Proceedings of the 58th IEEE/ACM International Symposium on Microarchitecture, 2025

SageSC: Accelerating GraphSAGE Minibatch Inference on Memory-Intensive Graphs.

Yuchen Gui, Wei Yuan, Qizhe Wu, Huawen Liang, Letian Zhao, Linfeng Tao, Zhongguang Xu, Xi Jin

Proceedings of the 43rd IEEE International Conference on Computer Design, 2025

Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs.

Qizhe Wu, Huawen Liang, Yuchen Gui, Zhichen Zeng, Zerong He, Linfeng Tao, Xiaotian Wang, Letian Zhao, Zhaoxi Zeng, Wei Yuan, Wei Wu, Xi Jin

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2025

2024

HBM-Based Hardware Accelerator for GNN Sampling and Aggregation.

Yuchen Gui, Qizhe Wu, Wei Yuan, Huawen Liang, Xiaotian Wang, Xi Jin

Proceedings of the IEEE High Performance Extreme Computing Conference, 2024

RingTK: A Ring, Parallel and High Performance Top-K Sorter on FPGA.

Huawen Liang, Qizhe Wu, Wei Yuan, Teng Tian, Xi Jin

Proceedings of the 32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2024

A FPGA-HBM-Based Hardware Streaming Accelerator for GNN Sampling.

Yuchen Gui, Qizhe Wu, Wei Yuan, Huawen Liang, Xiaotian Wang, Xi Jin

Proceedings of the 35th IEEE International Conference on Application-specific Systems, 2024

2022

QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism.

Wei Yuan, Teng Tian, Qizhe Wu, Xi Jin

J. Syst. Archit., 2022

FP-GNN: Adaptive FPGA accelerator for Graph Neural Networks.

Teng Tian, Letian Zhao, Xiaotian Wang, Qizhe Wu, Wei Yuan, Xi Jin

Future Gener. Comput. Syst., 2022

Hardware Acceleration of Sampling Algorithms in Sample and Aggregate Graph Neural Networks.

Yuchen Gui, Boyi Wei, Wei Yuan, Xi Jin

CoRR, 2022

2021

A Gather Accelerator for GNNs on FPGA Platform.

Wei Yuan, Teng Tian, Huawen Liang, Xi Jin

Proceedings of the 27th IEEE International Conference on Parallel and Distributed Systems, 2021

Software-Hardware Co-Optimization on Partial-Sum Problem for PIM-based Neural Network Accelerator.

Qizhe Wu, Linfeng Tao, Huawen Liang, Wei Yuan, Teng Tian, Shuang Xue, Xi Jin

Proceedings of the 2021 IEEE High Performance Extreme Computing Conference, 2021