Zhongguang Xu

According to our database, Zhongguang Xu authored at least 5 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

A Yield-enhanced and Highly Reliable 512k-bit HZO-based 2T2C FeRAM Chip Enabled with Charge Pump.

Xiangyin Chen, Jing Wang, Yangtong Yu, Zhongguang Xu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025

F³: An FPGA-Based Transformer Fine-Tuning Accelerator With Flexible Floating Point Format.

Zerong He, Xi Jin, Zhongguang Xu

IEEE J. Emerg. Sel. Topics Circuits Syst., June, 2025

SageSC: Accelerating GraphSAGE Minibatch Inference on Memory-Intensive Graphs.

Yuchen Gui, Wei Yuan, Qizhe Wu, Huawen Liang, Letian Zhao, Linfeng Tao, Zhongguang Xu, Xi Jin

Proceedings of the 43rd IEEE International Conference on Computer Design, 2025

INF-DRAM: An In-Memory Prefetching DRAM Architecture.

Hairui Zhu, Haitao Du, Zhongguang Xu, Yi Kang

Proceedings of the Algorithms and Architectures for Parallel Processing, 2025

2024

Task-Level Parallelism for the Multifrontal Method in Tightly Coupled CPU-FPGA Architectures.

Zerong He, Zekang Cheng, Zhongguang Xu, Xi Jin

Proceedings of the IEEE High Performance Extreme Computing Conference, 2024