R. R. Manikandan

According to our database, R. R. Manikandan authored at least 7 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT Applications.

Vipul Singhal, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha P. Chandrakasan

Proceedings of the 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, 2021

2018

A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled Systems.

R. R. Manikandan, Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale

Proceedings of the 31st International Conference on VLSI Design and 17th International Conference on Embedded Systems, 2018

2017

A High Performance Switchable Multiband Inductor Structure for LC-VCOs.

R. R. Manikandan, Venkata Narayana Rao Vanukuru

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

2015

A Digital Frequency Multiplication Technique for Energy Efficient Transmitters.

R. R. Manikandan, Abhishek Kumar, Bharadwaj Amrutur

IEEE Trans. Very Large Scale Integr. Syst., 2015

A zero charge-pump mismatch current tracking loop for reference spur reduction in PLLs.

R. R. Manikandan, Bharadwaj S. Amrutur

Microelectron. J., 2015

2014

Design and modeling of high-Q variable width and spacing, planar and 3-D stacked spiral inductors.

R. R. Manikandan, Venkata Narayana Rao Vanukuru, Anjan Chakravorty, Bharadwaj S. Amrutur

Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

2013

Experimental Study on Substrate Noise Effects of a Pulsed Clocking Scheme on PLL Performance.

R. R. Manikandan, Bharadwaj Amrutur

IEEE Trans. Circuits Syst. II Express Briefs, 2013