Rafael Ruiz-Sautua

According to our database, Rafael Ruiz-Sautua authored at least 14 papers between 2003 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications.

María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, Román Hermida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Performance-driven scheduling of behavioural specifications.

María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías

Integr., 2009

Subword Switching Activity Minimization to Optimize Dynamic Power Consumption.

María C. Molina, Rafael Ruiz-Sautua, Alberto A. Del Barrio, Jose Manuel Mendias

IEEE Des. Test Comput., 2009

2008

Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.

Pedro Garcia-Repetto, María C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis.

Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Area optimization of multi-cycle operators in high-level synthesis.

María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Bitwise scheduling to balance the computational cost of behavioral specifications.

María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Pre-synthesis optimization of multiplications to improve circuit performance.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Performance-driven read-after-write dependencies softening in high-level synthesis.

Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2005 Design, 2005

Arrival time aware scheduling to minimize clock cycle length.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Behavioural Scheduling to Balance the Bit-Level Computational Effort.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Behavioural Bitwise Scheduling Based on Computational Effort Balancing.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the 2004 Design, 2004

2003

Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the Integrated Circuit and System Design, 2003