María C. Molina

According to our database, María C. Molina authored at least 33 papers between 2000 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Improving circuit performance with multispeculative additive trees in high-level synthesis.

Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina

Microelectron. J., 2014

2013

A fragmentation aware High-Level Synthesis flow for low power heterogenous datapaths.

Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida

Integr., 2013

Multispeculative additive trees in high-level synthesis.

Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, Jose Manuel Mendias, María C. Molina

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Multispeculative Addition Applied to Datapath Synthesis.

Alberto A. Del Barrio, Román Hermida, Seda Ogrenci Memik, José M. Mendías, María C. Molina

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2011

A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis.

Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, Jose Manuel Mendias, Román Hermida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Power optimization in heterogenous datapaths.

Alberto A. Del Barrio, Seda Ogrenci Memik, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Robust Bioinspired Architecture for Optical-Flow Computation.

Guillermo Botella Juan, Antonio García Ríos, M. Rodriguez-Alvarez, Eduardo Ros Vidal, Uwe Meyer-Bäse, María C. Molina

IEEE Trans. Very Large Scale Integr. Syst., 2010

Using Speculative Functional Units in high level synthesis.

Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Román Hermida, Seda Ogrenci Memik

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Frequent-Pattern-Guided Multilevel Decomposition of Behavioral Specifications.

María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, Román Hermida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Performance-driven scheduling of behavioural specifications.

María C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías

Integr., 2009

Subword Switching Activity Minimization to Optimize Dynamic Power Consumption.

María C. Molina, Rafael Ruiz-Sautua, Alberto A. Del Barrio, Jose Manuel Mendias

IEEE Des. Test Comput., 2009

Enhanced gradient-based motion vector coprocessor.

Guillermo Botella Juan, Antonio García Ríos, Uwe Meyer-Bäse, Manuel Rodríguez, María C. Molina, Luís Parrilla Roure

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008

Applying speculation techniques to implement functional units.

Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida, Francisco Tirado

Proceedings of the 26th International Conference on Computer Design, 2008

Exploiting Internal Operation Patterns during the High-Level Synthesis of Time-Constrained Circuits.

Pedro Garcia-Repetto, María C. Molina, Rafael Ruiz-Sautua, Guillermo Botella Juan

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis.

Alberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis.

Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Area optimization of multi-cycle operators in high-level synthesis.

María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Bitwise scheduling to balance the computational cost of behavioral specifications.

María C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Pre-synthesis optimization of multiplications to improve circuit performance.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005

Performance-driven read-after-write dependencies softening in high-level synthesis.

Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2005 Design, 2005

Arrival time aware scheduling to minimize clock cycle length.

Rafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Behavioural Scheduling to Balance the Bit-Level Computational Effort.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Behavioural Bitwise Scheduling Based on Computational Effort Balancing.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the 2004 Design, 2004

2003

Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources.

María C. Molina, José M. Mendías, Román Hermida

J. Syst. Archit., 2003

Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis.

María C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida

Proceedings of the Integrated Circuit and System Design, 2003

High-Level Allocation to Minimize Internal Hardware Wastage.

María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2003 Design, 2003

2002

Bit-level scheduling of heterogeneous behavioural specifications.

María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Bit-Level Allocation of Multiple-Precision Specifications.

María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis.

José M. Mendías, Román Hermida, María C. Molina, Olga Peñalba

Proceedings of the 2002 Euromicro Symposium on Digital Systems Design (DSD 2002), 2002

Multiple-Precision Circuits Allocation Independent of Data-Objects Length.

María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 2002 Design, 2002

High-level synthesis of multiple-precision circuitsindependent of data-objects length.

María C. Molina, José M. Mendías, Román Hermida

Proceedings of the 39th Design Automation Conference, 2002

2000

Execution Condition Analysis in High Level Synthesis: A Unified Approach.

Olga Peñalba, José M. Mendías, María C. Molina

Proceedings of the 13th International Symposium on System Synthesis, 2000