Rakesh Gnana David Jeyasingh

According to our database, Rakesh Gnana David Jeyasingh authored at least 5 papers between 2008 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Experimental Demonstration of Array-level Learning with Phase Change Synaptic Devices.

Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong

CoRR, 2014

Brain-like associative learning using a nanoscale non-volatile phase change synaptic device array.

Sukru Burc Eryilmaz, Duygu Kuzum, Rakesh Gnana David Jeyasingh, SangBum Kim, Matthew BrightSky, Chung Lam, H.-S. Philip Wong

CoRR, 2014

2012

Phase Change Memory: Scaling and applications.

Rakesh Gnana David Jeyasingh, Jiale Liang, Marissa Caldwell, Duygu Kuzum, H.-S. Philip Wong

Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011

Adaptive Keeper Design for Dynamic Logic Circuits Using Rate Sensing Technique.

Rakesh Gnana David Jeyasingh, Navakanta Bhat, Bharadwaj S. Amrutur

IEEE Trans. Very Large Scale Integr. Syst., 2011

2008

A low power, process invariant keeper for high speed dynamic logic circuits.

Rakesh Gnana David Jeyasingh, Navakanta Bhat

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008