Ramayya Kumar

According to our database, Ramayya Kumar authored at least 33 papers between 1989 and 1999.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

1999

Invited Talk: Practical Use of Formal Verification - Where are we? Where do we go?

Ramayya Kumar

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

1998

A Practical Methodology for the Formal Verification of RISC Processors.

Sofiène Tahar, Ramayya Kumar

Formal Methods Syst. Des., 1998

1997

A constructive approach towards correctness of synthesis-application within retiming.

Dirk Eisenbiegler, Ramayya Kumar, Christian Blumenröhr

Proceedings of the European Design and Test Conference, 1997

1996

Implementation Issues About the Embedding of Existing High Level Synthesis Algorithms in HOL.

Dirk Eisenbiegler, Christian Blumenröhr, Ramayya Kumar

Proceedings of the Theorem Proving in Higher Order Logics, 9th International Conference, 1996

Formal Synthesis in Circuit Design - A Classification and Survey.

Ramayya Kumar, Christian Blumenröhr, Dirk Eisenbiegler, Detlef Schmid

Proceedings of the Formal Methods in Computer-Aided Design, First International Conference, 1996

1995

Formal Specification and Verification Techniques for RISC Pipeline Conflicts.

Sofiène Tahar, Ramayya Kumar

Comput. J., 1995

Formal synthesis of circuits with a simple handshake protocol.

Ramayya Kumar, Thomas Kropf, Klaus Schneider

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

An Automata Theory Dedicated towards Formal Circuit Synthesis.

Dirk Eisenbiegler, Ramayya Kumar

Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1995

Generic design flows for project management in a framework environment.

Ewa Kwee-Christoph, Fridtjof Feldbusch, Ramayya Kumar, Arno Kunzmann

Proceedings of the 1995 European Design and Test Conference, 1995

Formally embedding existing high level synthesis algorithms.

Dirk Eisenbiegler, Ramayya Kumar

Proceedings of the Correct Hardware Design and Verification Methods, 1995

1994

Accelerating Tableaux Proofs Using Compact Representations.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Formal Methods Syst. Des., 1994

Implementational Issues for Verifying RISC-Pipeline Conflicts in HOL.

Sofiène Tahar, Ramayya Kumar

Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994

Automating Verification by Functional Abstraction at the System Level.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Higher Order Logic Theorem Proving and Its Applications, 1994

A Formal Framework for High Level Synthesis.

Thomas Kropf, Klaus Schneider, Ramayya Kumar

Proceedings of the Theorem Provers in Circuit Design, 1994

Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path.

Klaus Schneider, Thomas Kropf, Ramayya Kumar

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Formal verification of pipeline conflicts in RISC processors.

Ramayya Kumar, Sofiène Tahar

Proceedings of the Proceedings EURO-DAC'94, 1994

1993

Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment.

Ramayya Kumar, Klaus Schneider, Thomas Kropf

Formal Methods Syst. Des., 1993

Implementing a Methodology for Formally Verifying RISC Processors in HOL.

Sofiène Tahar, Ramayya Kumar

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993

Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993

Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993

A Functional Approach for Formalizing Regular Hardware Structures.

Dirk Eisenbiegler, Klaus Schneider, Ramayya Kumar

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1993

Towards a Methodology for the Formal Hierarchical Verification.

Sofiène Tahar, Ramayya Kumar

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

Hardware-Verification using First Order BDDs.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993

Embedding Hardware Verification Within a Commercial Design Framework.

Thomas Kropf, Ramayya Kumar, Klaus Schneider

Proceedings of the Correct Hardware Design and Verification Methods, 1993

1992

Modelling Generic Hardware Structures by Abstract Datatypes.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992

Efficient Representation and Computation of Tableau Proofs.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Higher Order Logic Theorem Proving and its Applications, 1992

The FAUST - Prover.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Automated Deduction, 1992

1991

Structure in Hardware Proofs: First Steps Towards Automation in a Higher-Order Environment.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the VLSI 91, 1991

First Steps Towards Automating Hardware Proofs in HOL.

Ramayya Kumar, Thomas Kropf, Klaus Schneider

Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991

Integrating a First-Order Automatic Prover in the HOL Environment.

Ramayya Kumar, Thomas Kropf, Klaus Schneider

Proceedings of the 1991 International Workshop on the HOL Theorem Proving System and its Applications, 1991

Verification of synthesized circuits at register transfer level with flow graphs.

Fridtjof Feldbusch, Ramayya Kumar

Proceedings of the conference on European design automation, 1991

Automating Most Parts of Hardware Proofs in HOL.

Klaus Schneider, Ramayya Kumar, Thomas Kropf

Proceedings of the Computer Aided Verification, 3rd International Workshop, 1991

1989

CALLAS - ein System zur automatischen Synthese digitaler Schaltungen.

Thomas Wecker, Ramayya Kumar, Wolfgang Rosenstiel, Heinrich Krämer, Michael Neher

Inform. Forsch. Entwickl., 1989