Ranjeeth Sekhar
Orcid: 0009-0002-7370-7851
According to our database1,
Ranjeeth Sekhar authored at least 2 papers
between 2025 and 2026.
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Bibliography
2026
Energy and performance efficient NAND flash translation layer architecture for low-latency edge applications.
J. Parallel Distributed Comput., 2026
2025
A Three-Stage Dynamic Comparator for SAR ADC Optimized for Reduced Kickback Noise and Ultra-Low Delay.
J. Circuits Syst. Comput., January, 2025