Raphael 'kena' Poss

Orcid: 0000-0001-7067-3145

Affiliations:
  • University of Amsterdam, Netherlands


According to our database1, Raphael 'kena' Poss authored at least 35 papers between 2003 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
CockroachDB: The Resilient Geo-Distributed SQL Database.
Proceedings of the 2020 International Conference on Management of Data, 2020

2016
AM<sup>3</sup>: Towards A Hardware Unix Accelerator for Many-Cores.
IEEE Trans. Parallel Distributed Syst., 2016

2014
On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches.
ACM Trans. Embed. Comput. Syst., 2014

Cache-based high-level simulation of microthreaded many-core architectures.
J. Syst. Archit., 2014

Aca 2.0: Questions and Answers.
CoRR, 2014

Rust for functional programmers.
CoRR, 2014

Categories from scratch.
CoRR, 2014

Haskell for OCaml programmers.
CoRR, 2014

Signature-based high-level simulation of microthreaded many-core architectures.
Proceedings of the 4th International Conference On Simulation And Modeling Methodologies, 2014

Academia 2.0: removing the publisher middle-man while retaining impact.
Proceedings of the 1st ACM SIGPLAN Workshop on Reproducible Research Methodologies and New Publication Models in Computer Engineering, 2014

Analytical-Based High-Level Simulation of the Microthreaded Many-Core Architectures.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

A fault detection mechanism in a Data-flow scheduled Multithreaded processor.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Rethread: A Low-Cost Transient Fault Recovery Scheme for Multithreaded Processors.
Proceedings of the Ninth International Conference on Availability, 2014

Multicore Architectures and Their Software Landscape.
Proceedings of the Computing Handbook, 2014

2013
Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management.
Microprocess. Microsystems, 2013

On whether and how D-RISC and Microgrids can be kept relevant (self-assessment report)
CoRR, 2013

MGSim - Simulation tools for multi-core processor architectures
CoRR, 2013

S+Net: extending functional coordination with extra-functional semantics.
CoRR, 2013

Machines are benchmarked by code, not algorithms.
CoRR, 2013

Optimizing for confidence - Costs and opportunities at the frontier between abstraction and reality.
CoRR, 2013

Characterizing traits of coordination.
CoRR, 2013

Extrinsically adaptable systems.
CoRR, 2013

The essence of component-based design and coordination.
CoRR, 2013

MGSim - A simulation environment for multi-core research and education.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

On-demand thread-level fault detection in a concurrent programming environment.
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013

2012
SL: a "quick and dirty" but working intermediate language for SVP systems
CoRR, 2012

Collecting signatures to model latency tolerance in high-level simulations of microthreaded cores.
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2012

Heterogeneous integration to simplify many-core architecture simulations.
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2012

An infrastructure for multi-level optimisation through property annotation and aggregation.
Proceedings of the Fourth International Workshop on Nonfunctional System Properties in Domain Specific Modeling Languages, 2012

Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Lazy reference counting for the microgrid.
Proceedings of the 16th Workshop on Interaction between Compilers and Computer Architectures, 2012

2010
Concurrent Non-deferred Reference Counting on the Microgrid: First Experiences.
Proceedings of the Implementation and Application of Functional Languages, 2010

Resource-Agnostic Programming for Many-Core Microgrids.
Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010

2009
Making multi-cores mainstream - from security to scalability.
Proceedings of the Parallel Computing: From Multicores and GPU's to Petascale, 2009

2003
Introducing VAUCANSON.
Proceedings of the Implementation and Application of Automata, 2003


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